fix Portenta Cube after cyw.h updates

diff --git a/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Inc/mongoose_config.h b/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Inc/mongoose_config.h
index d8bf1b879169614a3a6bcc71c74b287693dc9f42..c02a7fae14959fe1a87ba180dadbaaca7edfe352 100644 (file)
--- a/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Inc/mongoose_config.h
+++ b/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Inc/mongoose_config.h
@@ -3,34 +3,11 @@
 // See https://mongoose.ws/documentation/#build-options
 #define MG_ARCH MG_ARCH_ARMGCC
 #define MG_TLS MG_TLS_BUILTIN
-#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
+//#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
 #define MG_IRAM __attribute__((section(".RamFunc")))
 
 #define MG_ENABLE_TCPIP 1
 #define MG_ENABLE_CUSTOM_MILLIS 1
 #define MG_ENABLE_CUSTOM_RANDOM 1
 #define MG_ENABLE_DRIVER_CYW_SDIO 1
-#define MG_ENABLE_PACKED_FS 1
-
-// #define MG_DRIVER_MDC_CR 4   // RMII MDC clock divider, from 0 to 5
-// #define MG_TCPIP_PHY_ADDR 0  // PHY address
-
-// For static IP configuration, define MG_TCPIP_{IP,MASK,GW}
-// By default, those are set to zero, meaning that DHCP is used
-//
-// #define MG_TCPIP_IP MG_IPV4(192, 168, 0, 10)     // IP
-// #define MG_TCPIP_GW MG_IPV4(192, 168, 0, 1)      // Gateway
-// #define MG_TCPIP_MASK MG_IPV4(255, 255, 255, 0)  // Netmask
-
-// Construct MAC address from the MCU unique ID. It is defined in the
-// ST CMSIS header as UID_BASE
-#define MGUID ((uint32_t *) 0x1ff1e800)  // Unique 96-bit chip ID
-#define MG_SET_MAC_ADDRESS(mac)      \
-  do {                               \
-    mac[0] = 2;                      \
-    mac[1] = MGUID[0] & 255;         \
-    mac[2] = (MGUID[0] >> 10) & 255; \
-    mac[3] = (MGUID[0] >> 19) & 255; \
-    mac[4] = MGUID[1] & 255;         \
-    mac[5] = MGUID[2] & 255;         \
-  } while (0)
+#define MG_ENABLE_TCPIP_DRIVER_INIT 0

diff --git a/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Src/main.c b/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Src/main.c
index 8532fa36e380c55e93dd19da518b57f476badabd..8ff808a01329178ec79703837dcddce20f4eb08b 100644 (file)
--- a/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Src/main.c
+++ b/tutorials/stm32/portenta-h7-cube-baremetal-builtin/CM7/Core/Src/main.c
@@ -294,21 +294,24 @@ int main(void)
 \r
   /* USER CODE END 1 */\r
 /* USER CODE BEGIN Boot_Mode_Sequence_0 */\r
-  int32_t timeout;\r
+//  int32_t timeout;\r
 /* USER CODE END Boot_Mode_Sequence_0 */\r
 \r
 /* USER CODE BEGIN Boot_Mode_Sequence_1 */\r
   /* Wait until CPU2 boots and enters in stop mode or timeout*/\r
+#if 0\r
+       // leave CM4 alone\r
   timeout = 0xFFFF;\r
   while((__HAL_RCC_GET_FLAG(RCC_FLAG_D2CKRDY) != RESET) && (timeout-- > 0));\r
   if ( timeout < 0 )\r
   {\r
-  Error_Handler();\r
+       Error_Handler();\r
   }\r
+#endif\r
 /* USER CODE END Boot_Mode_Sequence_1 */\r
   /* MCU Configuration--------------------------------------------------------*/\r
 \r
-  /* Reset of all peripherals, Initializes the Flash interface and the Systick. */\r
+  /* Reset of all peripherals, Initializes the Flash interface and the SysTick. */\r
   HAL_Init();\r
 \r
   /* USER CODE BEGIN Init */\r
@@ -318,6 +321,8 @@ int main(void)
   /* Configure the system clock */\r
   SystemClock_Config();\r
 /* USER CODE BEGIN Boot_Mode_Sequence_2 */\r
+#if 0\r
+       // leave CM4 alone\r
 /* When system initialization is finished, Cortex-M7 will release Cortex-M4 by means of\r
 HSEM notification */\r
 /*HW semaphore Clock enable*/\r
@@ -333,6 +338,7 @@ if ( timeout < 0 )
 {\r
 Error_Handler();\r
 }\r
+#endif\r
 /* USER CODE END Boot_Mode_Sequence_2 */\r
 \r
   /* USER CODE BEGIN SysInit */\r

diff --git a/tutorials/stm32/portenta-h7-make-baremetal-builtin/Makefile b/tutorials/stm32/portenta-h7-make-baremetal-builtin/Makefile
index 2d803b6930cf1c7b650f22881e25847b85cb2c1d..38587dbc4aba6af3ac23c4ae216ee5e4108ea86e 100644 (file)
--- a/tutorials/stm32/portenta-h7-make-baremetal-builtin/Makefile
+++ b/tutorials/stm32/portenta-h7-make-baremetal-builtin/Makefile
@@ -26,7 +26,8 @@ firmware.elf: cmsis_core cmsis_mcu mbed $(SOURCES) $(wildcard *.h) link.ld Makef
        arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@
 
 flash: firmware.bin
-       STM32_Programmer_CLI -c port=swd -w $< 0x8040000 -hardRst
+       dfu-util -a 0 -s 0x8040000:leave -D $<
+       # connecting SWD: STM32_Programmer_CLI -c port=swd -w $< 0x8040000 -hardRst
 
 cmsis_core:     # ARM CMSIS core headers
        git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@

diff --git a/tutorials/stm32/portenta-h7-make-baremetal-builtin/mongoose_config.h b/tutorials/stm32/portenta-h7-make-baremetal-builtin/mongoose_config.h
index 06e4766c38a270306655ca02797ba2bc777d024e..aaf945fa84b3471ecd93871e8391e957df5cc007 100644 (file)
--- a/tutorials/stm32/portenta-h7-make-baremetal-builtin/mongoose_config.h
+++ b/tutorials/stm32/portenta-h7-make-baremetal-builtin/mongoose_config.h
@@ -3,7 +3,7 @@
 // See https://mongoose.ws/documentation/#build-options
 #define MG_ARCH MG_ARCH_ARMGCC
 #define MG_TLS MG_TLS_BUILTIN
-#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
+//#define MG_OTA MG_OTA_STM32H7_DUAL_CORE
 
 #define MG_ENABLE_TCPIP 1
 #define MG_ENABLE_CUSTOM_MILLIS 1