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11 hours agosimplify-rtx: Fix up (ne (ior (ne x 0) y) 0) simplification [PR123114]
Jakub Jelinek [Sat, 27 Dec 2025 10:45:18 +0000 (11:45 +0100)]
simplify-rtx: Fix up (ne (ior (ne x 0) y) 0) simplification [PR123114]

The following testcase ICEs on x86_64-linux since the PR52345
(ne (ior (ne x 0) y) 0) simplification was (slightly) fixed.
It wants to optimize
    (set (reg/i:DI 10 a0)
        (ne:DI (ior:DI (ne:DI (reg:DI 151 [ a ])
                    (const_int 0 [0]))
                (reg:DI 152 [ b ]))
            (const_int 0 [0])))
but doesn't check important property of that, in particular
that the mode of the inner NE operand is the same as the
mode of the inner NE.
The following testcase has
(set (reg:CCZ 17 flags)
    (compare:CCZ (ior:QI (ne:QI (reg/v:SI 104 [ c ])
                (const_int 0 [0]))
            (reg:QI 98 [ _5 ]))
        (const_int 0 [0])))
where cmp_mode is QImode, but the mode of the inner NE operand
is SImode instead, and it attempts to create
  (ne:CCZ (ior:QI (reg/v:SI 104 [ c ]) (reg:QI 98 [ _5 ])) (const_int 0))
which obviously crashes later on.

The following patch fixes it by checking the mode of the inner NE operand
and also by using CONST0_RTX (cmp_mode) instead of CONST0_RTX (mode)
because that is the mode of the other operand, not mode which is the
mode of the outer comparison (though, guess for most modes it will still
be const0_rtx).

I guess for mode mismatches we could arbitrarily choose some extension (zero
or sign) and extend the narrower mode to the wider mode, but I doubt that it
would ever match on any target.  But even then we'd need to limit it, we
wouldn't want to deal with another mode class (say floating point
comparisons), and dunno about vector modes etc.

2025-12-27  Jakub Jelinek  <jakub@redhat.com>

PR rtl-optimization/123114
* simplify-rtx.cc (simplify_context::simplify_relational_operation):
Verify XEXP (XEXP (op0, 0), 0) mode and use CONST0_RTX (cmp_mode)
instead of CONST0_RTX (mode).

* gcc.dg/pr123114.c: New test.

12 hours agoAda: Fix assertion failure for unfrozen mutably tagged type as actual
Eric Botcazou [Sat, 27 Dec 2025 09:24:52 +0000 (10:24 +0100)]
Ada: Fix assertion failure for unfrozen mutably tagged type as actual

...in instance.  An instantiation is a freezing point for the actuals,
so the mutably tagged type will be frozen by the instantiation, but this
happens too late in the current implementation of mutably tagged types,
because the declaration of their CW-equivalent type is not analyzed until
after the type is frozen.

gcc/ada/
PR ada/123306
* sem_ch12.adb (Analyze_One_Association): Immediately freeze the
root type of mutably tagged types used as actual type parameters.

gcc/testsuite/
* gnat.dg/specs/mutably_tagged1.ads: New test.

18 hours agoRevert "ifcvt: Move noce_try_cond_zero_arith last"
Andrew Pinski [Fri, 26 Dec 2025 20:15:02 +0000 (12:15 -0800)]
Revert "ifcvt: Move noce_try_cond_zero_arith last"

This reverts commit ce55e48fc4ae41064b01e3241b17e6434fbaf07a.

21 hours agoDaily bump.
GCC Administrator [Sat, 27 Dec 2025 00:16:26 +0000 (00:16 +0000)]
Daily bump.

22 hours ago[PATCH v2 1/1] Ensure _UNDER_TEST executables are target based
Matthew Fortune [Fri, 26 Dec 2025 23:53:51 +0000 (16:53 -0700)]
[PATCH v2 1/1] Ensure _UNDER_TEST executables are target based

This fixes an issue where some G++ tests need to use a C compiler as
well as C++ to build an LTO test.

contrib/
* test_installed: Use target to select default gcc/g++ etc.
under test.

Signed-off-by: Matthew Fortune <matthew.fortune@imgtec.com>
Signed-off-by: Faraz Shahbazker <fshahbazker@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.rakic@htecgroup.com>
23 hours ago[RISC-V][PR target/123283] Wrap naked REG operands with a USE.
Jeff Law [Fri, 26 Dec 2025 22:24:56 +0000 (15:24 -0700)]
[RISC-V][PR target/123283] Wrap naked REG operands with a USE.

I was in the process of testing this patch when Andreas filed PR123283.

What's going on is we have patterns in sync.md which have naked operands:

(define_insn "subword_atomic_fetch_strong_<atomic_optab>"
  [(set (match_operand:SI 0 "register_operand" "=&r")   ;; old value at mem
    (match_operand:SI 1 "memory_operand" "+A"))        ;; mem location
   (set (match_dup 1)
    (unspec_volatile:SI
      [(any_atomic:SI (match_dup 1)
             (match_operand:SI 2 "arith_operand" "rI")) ;; value for op
       (match_operand:SI 3 "const_int_operand")]           ;; model
     UNSPEC_SYNC_OLD_OP_SUBWORD))
    (match_operand:SI 4 "arith_operand" "rI")          ;; mask
    (match_operand:SI 5 "arith_operand" "rI")          ;; not_mask
    (clobber (match_scratch:SI 6 "=&r"))               ;; tmp_1
    (clobber (match_scratch:SI 7 "=&r"))]              ;; tmp_2

Note carefully operands #4 and #5 and the fact they are a toplevel construct as
opposed to being an operand of another RTX.  That's a no-no.  They need to be
wrapped with a USE.

I spot-checked sync.md and found a few more instances.   Fixing the set I found
fixed the testsuite regressions I was seeing and also fixes the mis-compilation
of libgo.  Bootstrapped and regression tested on my BPI and Pioneer.  It's also
clean on the riscv64-elf and riscv32-elf targets in my tester.

PR target/123283
gcc/
* config/riscv/sync.md (subword_atomic_fetch_strong_nand): Add
USEs for naked operands that might be pseudos.
(subword_atomic_fetch_strong_<atomic_optab>): Likewise.
(subword_atomic_exchange_strong): Likewise.
(subword_atomic_cas_strong): Likewise.

23 hours agoAda: Adjust fix for internal error on illegal aggregate for private type
Eric Botcazou [Fri, 26 Dec 2025 22:10:15 +0000 (23:10 +0100)]
Ada: Adjust fix for internal error on illegal aggregate for private type

This adds a more robust guard to Resolve_Record_Aggregate.

gcc/ada/
PR ada/123088
* sem_aggr.adb (Resolve_Record_Aggregate): Add more robust guard.

32 hours agoAda: Fix bogus error on aggregate in call with qualified type in instance
Eric Botcazou [Fri, 26 Dec 2025 13:52:32 +0000 (14:52 +0100)]
Ada: Fix bogus error on aggregate in call with qualified type in instance

This happens with a container aggregate in the testcase, although this can
very likely happen with a record aggregate as well.  The trick used in the
Save_Global_References procedure for aggregates loses the qualification of
the type of the formal for which the aggregate is the actual.

gcc/ada/
PR ada/123302
* sem_ch12.adb (Save_Global_Reference.Save_References_In_Aggregate):
Recurse on the scope of the type to find one that is visible, in the
case of an actual in a subprogram call with a local type.

gcc/testsuite/
* gnat.dg/aggr34.adb: New test.
* gnat.dg/aggr34_pkg1.ads, gnat.dg/aggr34_pkg1.adb: New helper.
* gnat.dg/aggr34_pkg2.ads, gnat.dg/aggr34_pkg2.adb: Likewise.
* gnat.dg/aggr34_pkg3.ads: Likewise.

33 hours agoc-family: Fix ICE with -MD and -fdeps-format sharing output [PR121864]
Egas Ribeiro [Mon, 22 Dec 2025 21:41:00 +0000 (21:41 +0000)]
c-family: Fix ICE with -MD and -fdeps-format sharing output [PR121864]

When -MD, -fdeps-format=p1689r5 and -save-temps are used without
explicit output files, they default to the same stream, which is
invalid. The error message attempted to print fdeps_file, but this is
NULL in this case, causing an ICE.

Use out_fname as a fallback when fdeps_file is NULL to avoid the ICE
and provide a meaningful error message.

Fix suggested by Andrew Pinski.

PR c++/121864

gcc/c-family/ChangeLog:

* c-opts.cc (c_common_finish): Use out_fname as fallback when
fdeps_file is NULL in error message.

Signed-off-by: Egas Ribeiro <egas.g.ribeiro@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
36 hours agoAda: Fix illegal Aggregate aspect not rejected
Eric Botcazou [Fri, 26 Dec 2025 09:44:57 +0000 (10:44 +0100)]
Ada: Fix illegal Aggregate aspect not rejected

The Ada 2022 RM is adamant that the names specified in the Aggregate aspect
must denote "exactly one" subprogram, in other words that it is illegal to
use names that denote more than one subprogram in the Aggregate aspect.

gcc/ada/
PR ada/123289
* sem_ch13.adb (Resolve_Aspect_Aggregate.Resolve_Operation): Give
an error if the operation's name denotes more than one subprogram.

gcc/testsuite/
* gnat.dg/specs/aggr9.ads: New test.

41 hours agodoc: make regenerate-opt-urls
Sandra Loosemore [Fri, 26 Dec 2025 04:37:53 +0000 (04:37 +0000)]
doc: make regenerate-opt-urls

gcc/ChangeLog
* config/i386/i386.opt.urls: Regenerated.
* config/riscv/riscv.opt.urls: Regenerated.

41 hours agodoc, riscv: Clean up RISC-V extensions documentation
Sandra Loosemore [Sun, 21 Dec 2025 02:23:43 +0000 (02:23 +0000)]
doc, riscv: Clean up RISC-V extensions documentation

This patch fixes a number of problems I observed in the RISC-V
extensions documentation, which is autogenerated from .def files:

- The formatting of the table looked terrible in the PDF output, with
overlapping text.  I made the first two columns wider to fix this.

- Also the extension names in the table should have @samp{} markup.

- Many extensions were missing a full name/description.  (Documenting
something as "xyzzy extension" adds nothing useful to readers when we
are already listing the extension name "xyzzy" in the table.)

- Irregular spelling and capitalization in the full names.

gcc/ChangeLog
* config/riscv/gen-riscv-ext-texi.cc: Fix table markup and
layout.
* config/riscv/riscv-ext-corev.def: Document missing extensions,
regularize spelling/capitalization in existing descriptions
* config/riscv/riscv-ext-mips.def: Likewise.
* config/riscv/riscv-ext-sifive.def: Likewise.
* config/riscv/riscv-ext-thead.def: Likewise.
* config/riscv/riscv-ext.def: Likewise.
* doc/riscv-ext.texi: Regenerated.

41 hours agodoc, riscv: Clean up documentation of RISC-V options [PR122243]
Sandra Loosemore [Sun, 14 Dec 2025 00:38:48 +0000 (00:38 +0000)]
doc, riscv: Clean up documentation of RISC-V options [PR122243]

gcc/ChangeLog
PR other/122243
* config/riscv/riscv.opt (mplt): Mark deprecated option Undocumented.
(msmall-data-limit=): Mark RejectNegative.
* doc/invoke.texi (Option Summary) <RISC-V Options>:  Remove -mplt
documentation.  Only list one form of each option.  Add missing
options -mcpu, -mscalar-strict-align, -mno-vector-strict-align,
-momit-leaf-frame-pointer, -mstringop-strategy, -mrvv-vector-bits,
-mrvv-max-lmul, -madjust-lmul-cost, -mmax-vectorization, and
-mno-autovec-segment.
(RISC-V Options):  Remove -mplt documentation.  Add documentation for
missing options listed above.  Add missing index entries for negative
forms.  Correct the default for the -minline-str* options, which
has changed.  Copy-edit for markup, spelling, and usage.  Trivial
whitespace fixes.

45 hours agoDaily bump.
GCC Administrator [Fri, 26 Dec 2025 00:16:22 +0000 (00:16 +0000)]
Daily bump.

2 days agotree-ssa-math-opts: Fix ICE if vectorizer produces IFN_SIN/COS calls
Arsen Arsenović [Fri, 19 Dec 2025 10:33:05 +0000 (10:33 +0000)]
tree-ssa-math-opts: Fix ICE if vectorizer produces IFN_SIN/COS calls

With the following testcase, on AMDGCN with -Ofast:

  void
  foo (float* output, float* input)
  {
      for (int i = 0; i < 1024 * 1024; i++) {
          output[i] = __builtin_sinf (input[i]) + __builtin_cosf (input[i]);
      }
  }

... the following ICE happens:

  during GIMPLE pass: sincos
  test.cpp: In function 'void foo(float*, float*)':
  test.cpp:2:1: internal compiler error: Segmentation fault
      2 | foo (float* output, float* input)
        | ^~~
  [... snipped ...]
  0x17befb8 types_compatible_p(tree_node*, tree_node*)
          gcc/gimple-expr.h:67
  0x17befb8 execute_cse_sincos_1
          gcc/tree-ssa-math-opts.cc:1299
  0x17befb8 execute
          gcc/tree-ssa-math-opts.cc:2248

This happens because the vect pass converted the testcase into:

  vect__4.6_40 = MEM <vector(64) float> [(float *)vectp_input.4_38];
  vect__6.8_42 = .COS (vect__4.6_40);
  vect__5.7_41 = .SIN (vect__4.6_40);
  vect__8.9_43 = vect__5.7_41 + vect__6.8_42;

Then, sincos attempts to find the type of the IFN_SIN/IFN_COS via
mathfn_built_in_type.  This fails, so the compiler crashes.

For these IFNs, their input type is the same as their output type, so
we can fall back to that.

Note that, currently, GCC can't seem to handle vector sincos/cexpi
operations, so any attempt to CSE these will fail quickly after.  This
patch does not fix that, only the ICE that happens in the attempt.

gcc/ChangeLog:

* tree-ssa-math-opts.cc (execute_cse_sincos_1): If
mathfn_built_in_type fails to determine a type for our
operation, presume that it is the same as the input type.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/sincos-ice-on-ifn_sin-call.c: New test.
* gcc.target/gcn/sincos-ice-on-ifn_sin-call-1.c: New test.

2 days agoDaily bump.
GCC Administrator [Thu, 25 Dec 2025 00:16:27 +0000 (00:16 +0000)]
Daily bump.

3 days agoRISC-V: Add test for vec_duplicate + vmsleu.vv combine with GR2VR cost 0, 1 and 15
Pan Li [Sun, 21 Dec 2025 12:10:14 +0000 (20:10 +0800)]
RISC-V: Add test for vec_duplicate + vmsleu.vv combine with GR2VR cost 0, 1 and 15

Add asm dump check and run test for vec_duplicate + vmsleu.vv
combine to vmsleu.vx, with the GR2VR cost is 0, 2 and 15.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Add asm check
for vmsleu.vx.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
helper macros.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
data for run test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsleu-run-1-u16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsleu-run-1-u32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsleu-run-1-u64.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vx_vmsleu-run-1-u8.c: New test.

Signed-off-by: Pan Li <pan2.li@intel.com>
3 days agoRISC-V: Combine vec_duplicate + vmsleu.vv to vmsleu.vx on GR2VR cost
Pan Li [Sun, 21 Dec 2025 12:07:43 +0000 (20:07 +0800)]
RISC-V: Combine vec_duplicate + vmsleu.vv to vmsleu.vx on GR2VR cost

This patch would like to combine the vec_duplicate + vmsleu.wv to the
vmsleu.vx.  From example as below code.  The related pattern will depend
on the cost of vec_duplicate from GR2VR.  Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.

Assume we have asm code like below, GR2VR cost is 0.

Before this patch:
  11       beq a3,zero,.L8
  12       vsetvli a5,zero,e32,m1,ta,ma
  13       vmv.v.x v2,a2
  ...
  16   .L3:
  17       vsetvli a5,a3,e32,m1,ta,ma
  ...
  22       vmsleu.wv v1,v2,v3
  ...
  25       bne a3,zero,.L3

After this patch:
  11       beq a3,zero,.L8
  ...
  14    .L3:
  15       vsetvli a5,a3,e32,m1,ta,ma
  ...
  20       vmsleu.wx v1,a2,v3
  ...
  23       bne a3,zero,.L3

gcc/ChangeLog:

* config/riscv/predicates.md: Add geu to the swappable
cmp operator iterator.
* config/riscv/riscv-v.cc (get_swapped_cmp_rtx_code): Take
care of the swapped rtx code correspondly.

Signed-off-by: Pan Li <pan2.li@intel.com>
3 days agoaarch64: Add the ability to have three types in an sve/sme intrinsic name
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:27 +0000 (11:41 +0000)]
aarch64: Add the ability to have three types in an sve/sme intrinsic name

The majority of sve/sme intrinsics have names which are defined by one type
(like svuint8_t svextq[_u8]) or two types (like svsub_za32[_f32]_vg1x2).
Some intrinsics now have three types (like svtmopa_lane_za32[_s8_u8]).
This change extends the number of type_suffix_indexes from two to three
to cover this case.

gcc/
* config/aarch64/aarch64-sve-builtins-base.cc: (svmul_impl::fold):
Replace use of type_suffix_pair with type_suffix_triple.
* config/aarch64/aarch64-sve-builtins-shapes.cc: (parse_element_type):
Handle third type suffix.
(parse_type): Handle c2 in function signature. Add the u signature with
the ability to pass a tuple with twice as many vectors as the base type.
Calculate number of vectors against the type with the maximum number of
bits rather than "the other one".
(load_contiguous_base::resolve): Add argument to resolve_to call.
(compare_scalar_def::resolve): Likewise.
(ternary_mfloat8_def::resolve): Likewise.
(ternary_mfloat8_lane_def::resolve): Likewise.
(ternary_mfloat8_opt_n_def::resolve): Likewise.
* config/aarch64/aarch64-sve-builtins.cc: (TYPES_all_pred,
TYPES_all_count, TYPES_all_pred_count, TYPES_all_float,
TYPES_all_signed, TYPES_all_float_and_signed, TYPES_all_unsigned,
TYPES_all_integer, TYPES_all_arith, TYPES_all_data, TYPES_b, TYPES_c,
TYPES_b_unsigned, TYPES_b_integer, TYPES_b_data, TYPES_bh_integer,
TYPES_bs_unsigned, TYPES_bhs_signed, TYPES_bhs_unsigned,
TYPES_bhs_integer, TYPES_bh_data, TYPES_bhs_data, TYPES_bhs_widen,
TYPES_h_bfloat, TYPES_h_float, TYPES_h_integer, TYPES_h_data,
TYPES_hs_signed, TYPES_hs_integer, TYPES_hs_float, TYPES_hs_data,
TYPES_hd_unsigned, TYPES_hsd_signed, TYPES_hsd_integer, TYPES_hsd_data,
TYPES_h_float_mf8, TYPES_s_float, TYPES_s_float_mf8,
TYPES_s_float_hsd_integer, TYPES_s_float_sd_integer, TYPES_s_signed,
TYPES_s_unsigned, TYPES_s_integer, TYPES_s_data, TYPES_sd_signed,
TYPES_sd_unsigned, TYPES_sd_integer, TYPES_sd_data,
TYPES_all_float_and_sd_integer, TYPES_d_float, TYPES_d_unsigned,
TYPES_d_integer, TYPES_d_data, TYPES_cvt, TYPES_cvt_bfloat,
TYPES_cvt_h_s_float, TYPES_cvt_f32_f16, TYPES_cvt_long,
TYPES_cvt_narrow_s, TYPES_cvt_narrow, TYPES_cvt_s_s, TYPES_cvt_mf8,
TYPES_cvtn_mf8, TYPES_cvtnx_mf8, TYPES_inc_dec_n, TYPES_qcvt_x2,
TYPES_qcvt_x4, TYPES_qrshr_x2,TYPES_qrshru_x2, TYPES_qrshr_x4,
TYPES_qrshru_x4, TYPES_reinterpret, TYPES_reinterpret_b,TYPES_while,
TYPES_while_x, TYPES_while_x_c, TYPES_s_narrow_fsu,TYPES_all_za,
TYPES_d_za, TYPES_za_bhsd_data,TYPES_za_all_data, TYPES_za_h_mf8,
TYPES_za_hs_mf8, TYPES_za_h_bfloat, TYPES_za_h_float,
TYPES_za_s_b_signed, TYPES_za_s_b_unsigned, TYPES_za_s_b_integer,
TYPES_za_s_h_integer,TYPES_za_s_h_data, TYPES_za_s_unsigned,
TYPES_za_s_integer, TYPES_za_s_mf8, TYPES_za_s_float, TYPES_za_s_data,
TYPES_za_d_h_integer, TYPES_za_d_float, TYPES_za_d_integer,
TYPES_mop_base, TYPES_mop_base_signed, TYPES_mop_base_unsigned,
TYPES_mop_i16i64, TYPES_mop_i16i64_signed, TYPES_mop_i16i64_unsigned,
ΤYPES_za): Extend defines to three arguments.
(DEF_VECTOR_TYPE, DEF_DOUBLE_TYPE): Likewise.
(DEF_TRIPLE_TYPE): Add new define.
(DEF_SVE_TYPES_ARRAY): Redefine all types_ arrays into arrays of
type_suffix_triple.
(types_none): Likewise.
(function_instance::hash): Add third type to hash calculation.
(function_builder::get_name): Add third type to function name.
(function_builder::add_overloaded_functions): Handle third type.
(function_resolver::lookup_form): Likewise.
(function_resolver::resolve_to): Likewise.
(function_resolver::resolve_unary): Likewise.
* config/aarch64/aarch64-sve-builtins.h: (type_suffix_triple): replace
type_suffix_pair.
(function_group_info::types): Likewise.
(function_instance::ctor): Likewise.
(function_instance::type_suffix_ids): Likewise.
(function_resolver::lookup_form): Add third type argument.
(function_resolver::resolve_to): Likewise.
(function_instance::operator==): Add third type to equality calculation.

3 days agoaarch64: add 8-bit floating point dot product
Karl Meakin [Wed, 24 Dec 2025 11:41:27 +0000 (11:41 +0000)]
aarch64: add 8-bit floating point dot product

This patch adds support for the following intrinsics when sme-f8f16 is enabled:
  * svdot_za16[_mf8]_vg1x2_fpm
  * svdot_za16[_mf8]_vg1x4_fpm
  * svdot[_single]_za16[_mf8]_vg1x2_fpm
  * svdot[_single]_za16[_mf8]_vg1x4_fpm
  * svdot_lane_za16[_mf8]_vg1x2_fpm
  * svdot_lane_za16[_mf8]_vg1x4_fpm

This patch adds support for the following intrinsics when sme-f8f32 is enabled:
  * svdot_za32[_mf8]_vg1x2_fpm
  * svdot_za32[_mf8]_vg1x4_fpm
  * svdot[_single]_za32[_mf8]_vg1x2_fpm
  * svdot[_single]_za32[_mf8]_vg1x4_fpm
  * svdot_lane_za32[_mf8]_vg1x2_fpm
  * svdot_lane_za32[_mf8]_vg1x4_fpm
  * svvdot_lane_za32[_mf8]_vg1x2_fpm
  * svvdotb_lane_za32[_mf8]_vg1x4_fpm
  * svvdott_lane_za32[_mf8]_vg1x4_fpm

gcc:

* config/aarch64/aarch64-sme.md
(@aarch64_sme_<optab><SME_ZA_F8F16_32:mode><SME_ZA_FP8_x24:mode>): New insn.
(@aarch64_fvdot_half<optab>): Likewise.
(@aarch64_fvdot_half<optab>_plus): Likewise.
* config/aarch64/aarch64-sve-builtins-functions.h
(class svvdot_half_impl): New function impl.
* config/aarch64/aarch64-sve-builtins-sme.cc (FUNCTION): Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc (struct dot_half_za_slice_lane_def):
New function shape.
* config/aarch64/aarch64-sve-builtins-shapes.h: Likewise.
* config/aarch64/aarch64-sve-builtins-sme.def (svdot): New function.
(svdot_lane): Likewise.
(svvdot_lane): Likewise.
(svvdotb_lane): Likewise.
(svvdott_lane): Likewise.
* config/aarch64/aarch64-sve-builtins-sme.h (svvdotb_lane_za): New function.
(svvdott_lane_za): Likewise.
* config/aarch64/aarch64-sve-builtins.cc (TYPES_za_s_mf8): New types array.
(TYPES_za_hs_mf8): Likewise.
(za_hs_mf8): Likewise.
* config/aarch64/iterators.md (SME_ZA_F8F16): New mode iterator.
(SME_ZA_F8F32): Likewise.
(SME_ZA_FP8_x1): Likewise.
(SME_ZA_FP8_x2): Likewise.
(SME_ZA_FP8_x4): Likewise.
(UNSPEC_SME_FDOT_FP8): New unspec.
(UNSPEC_SME_FVDOT_FP8): Likewise.
(UNSPEC_SME_FVDOTT_FP8): Likewise.
(UNSPEC_SME_FVDOTB_FP8): Likewise.
(SME_FP8_DOTPROD): New int iterator.
(SME_FP8_FVDOT): Likewise.
(SME_FP8_FVDOT_HALF): Likewise.

gcc/testsuite:

* gcc.target/aarch64/sme2/acle-asm/dot_lane_za16_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_lane_za16_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_lane_za32_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_lane_za32_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_single_za16_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_single_za16_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_single_za32_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_single_za32_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_za16_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_za16_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_za32_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/dot_za32_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/vdot_lane_za16_mf8_vg1x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/vdotb_lane_za32_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/vdott_lane_za32_mf8_vg1x4.c: New test.
* gcc.target/aarch64/sve/acle/general-c/dot_half_za_slice_lane_fpm.c: New test.

3 days agoaarch64: add 8-bit floating-point sum of outer products and accumulate
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:26 +0000 (11:41 +0000)]
aarch64: add 8-bit floating-point sum of outer products and accumulate

This patch adds support for FMOPA (widening, 2-way, FP8 to FP16) when
sme-f8f16 is enabled using svmopa_za16[_mf8]_m_fpm and for FMOPA (widening,
4-way) when sme-f8f32 is enabled using svmopa_za32[_mf8]_m_fpm.

Asm tests for the new intrinsics are added, similar to those for existing
mopa_z16 intrinsics. Tests for the binary_za_m shape are added.

gcc:
* config/aarch64/aarch64-sme.md
(@aarch64_sme_<optab><SME_ZA_F8F16_32:mode><VNx16QI_ONLY:mode>): Add
new define_insn.
* config/aarch64/aarch64-sve-builtins-shapes.cc
(struct binary_za_m_base): Support fpm argument.
* config/aarch64/aarch64-sve-builtins-sme.cc (svmopa_za): Extend for
fp8.
* config/aarch64/aarch64-sve-builtins-sme.def (svmopa): Add new
DEF_SME_ZA_FUNCTION_GS_FPM entries.

gcc/testsuite:

* gcc.target/aarch64/sme/acle-asm/test_sme_acle.h: (TEST_UNIFORM_ZA):
Add fpm0 parameter.
* gcc.target/aarch64/sve/acle/general-c/binary_za_m_1.c: Add tests for
variants accepting fpm.
* gcc.target/aarch64/sme2/acle-asm/mopa_za16_mf8.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mopa_za32_mf8.c: Likewise.

3 days agoaarch64: add Multi-vector 8-bit floating-point multiply-add long
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:26 +0000 (11:41 +0000)]
aarch64: add Multi-vector 8-bit floating-point multiply-add long

This patch adds support for the following intrinsics when sme-f8f16 is enabled:
  * svmla_lane_za16[_mf8]_vg2x1_fpm
  * svmla_lane_za16[_mf8]_vg2x2_fpm
  * svmla_lane_za16[_mf8]_vg2x4_fpm
  * svmla_za16[_mf8]_vg2x1_fpm
  * svmla[_single]_za16[_mf8]_vg2x2_fpm
  * svmla[_single]_za16[_mf8]_vg2x4_fpm
  * svmla_za16[_mf8]_vg2x2_fpm
  * svmla_za16[_mf8]_vg2x4_fpm

This patch adds support for the following intrinsics when sme-f8f32 is enabled:
  * svmla_lane_za32[_mf8]_vg4x1_fpm
  * svmla_lane_za32[_mf8]_vg4x2_fpm
  * svmla_lane_za32[_mf8]_vg4x4_fpm
  * svmla_za32[_mf8]_vg4x1_fpm
  * svmla[_single]_za32[_mf8]_vg4x2_fpm
  * svmla[_single]_za32[_mf8]_vg4x4_fpm
  * svmla_za32[_mf8]_vg4x2_fpm
  * svmla_za32[_mf8]_vg4x4_fpm

Asm tests for the 32 bit versions follow the blueprint set in
mla_lane_za32_u8_vg4x1.c mla_za32_u8_vg4x1.c and similar.
16 bit versions follow similar patterns modulo differences in allowed offsets.

gcc:
* config/aarch64/aarch64-sme.md
(@aarch64_sme_<optab><SME_ZA_F8F16_32:mode><SME_ZA_FP8_x24:mode>): Add
new define_insn.
(*aarch64_sme_<optab><VNx8HI_ONLY:mode><SME_ZA_FP8_x24:mode>_plus,
*aarch64_sme_<optab><VNx4SI_ONLY:mode><SME_ZA_FP8_x24:mode>_plus,
@aarch64_sme_<optab><SME_ZA_F8F16_32:mode><VNx16QI_ONLY:mode>,
*aarch64_sme_<optab><VNx8HI_ONLY:mode><VNx16QI_ONLY:mode>_plus,
*aarch64_sme_<optab><VNx4SI_ONLY:mode><VNx16QI_ONLY:mode>_plus,
@aarch64_sme_single_<optab><SME_ZA_F8F16_32:mode><SME_ZA_FP8_x24:mode>,
*aarch64_sme_single_<optab><VNx8HI_ONLY:mode><SME_ZA_FP8_x24:mode>_plus,
*aarch64_sme_single_<optab><VNx4SI_ONLY:mode><SME_ZA_FP8_x24:mode>_plus,
@aarch64_sme_lane_<optab><SME_ZA_F8F16_32:mode><SME_ZA_FP8_x124:mode>,
*aarch64_sme_lane_<optab><VNx8HI_ONLY:mode><SME_ZA_FP8_x124:mode>,
*aarch64_sme_lane_<optab><VNx4SI_ONLY:mode><SME_ZA_FP8_x124:mode>):
Likewise.
* config/aarch64/aarch64-sve-builtins-shapes.cc
(struct binary_za_slice_lane_base): Support fpm argument.
(struct binary_za_slice_opt_single_base): Likewise.
* config/aarch64/aarch64-sve-builtins-sme.cc (svmla_za): Extend for fp8.
(svmla_lane_za): Likewise.
* config/aarch64/aarch64-sve-builtins-sme.def (svmla_lane): Add new
DEF_SME_ZA_FUNCTION_GS_FPM entries.
(svmla): Likewise.
* config/aarch64/iterators.md (SME_ZA_F8F16_32): Add new mode iterator.
(SME_ZA_FP8_x24, SME_ZA_FP8_x124): Likewise.
(UNSPEC_SME_FMLAL): Add new unspec.
(za16_offset_range): Add new mode_attr.
(za16_32_long): Likewise.
(za16_32_last_offset): Likewise.
(SME_FP8_TERNARY_SLICE): Add new iterator.
(optab): Add entry for UNSPEC_SME_FMLAL.

gcc/testsuite:

* gcc.target/aarch64/sme2/acle-asm/test_sme2_acle.h: (TEST_ZA_X1,
TEST_ZA_XN, TEST_ZA_SINGLE, TEST_ZA_SINGLE_Z15, TEST_ZA_LANE,
TEST_ZA_LANE_Z15): Add fpm0 parameter.
* gcc.target/aarch64/sve/acle/general-c/binary_za_slice_lane_1.c: Add
tests for variants accepting fpm.
* gcc.target/aarch64/sve/acle/general-c/binary_za_slice_opt_single_1.c:
Likewise.
* gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x1.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_lane_za16_mf8_vg2x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x1.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_lane_za32_mf8_vg4x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x1.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_za16_mf8_vg2x4.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x1.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/mla_za32_mf8_vg4x4.c: New test.

3 days agoaarch64: add basic support for sme-f8f16 and sme-f8f32
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:26 +0000 (11:41 +0000)]
aarch64: add basic support for sme-f8f16 and sme-f8f32

This patch adds support for the SME_F8F16 and SME_F8F32 features as architecture
options, along with related definitions. This support is required for subsequent
intrinsics to work.

gcc/
* config/aarch64/aarch64.h:
(TARGET_STREAMING_SME_F8F16, TARGET_STREAMING_SME_F8F32): Add defines.
* config/aarch64/aarch64-c.cc:
(__ARM_FEATURE_SME_F8F16, __ARM_FEATURE_SME_F8F32): Add defines.
* config/aarch64/aarch64-option-extensions.def:
(sme-f8f16, sme-f8f32): Add arch options in command line.
* config/aarch64/aarch64-sve-builtins-functions.h:
(sme_2mode_function_t): Pass unspec_for_mfp8 parameter through ctor.
* config/aarch64/aarch64-sve-builtins-sme.def:
(DEF_SME_FUNCTION_GS, DEF_SME_FUNCTION): Redefine based on
DEF_SME_FUNCTION_GS_FPM.
(DEF_SME_ZA_FUNCTION_GS, DEF_SME_ZA_FUNCTION): Redefine based on
DEF_SME_ZA_FUNCTION_GS_FPM.
(AARCH64_FL_SME_F8F16, AARCH64_FL_SME_F8F32): Add new
REQUIRED_EXTENSIONS sections.
* config/aarch64/aarch64-sve-builtins.cc:
(TYPES_za_h_mf8): Add new types.
(TYPES_za_s_mf8): Likewise.
(sme_function_groups): Define using DEF_SME_FUNCTION_GS_FPM instead of
DEF_SME_FUNCTION_GS.
* doc/invoke.texi: (sme-f8f16, sme-f8f32): Add documentation of option.

gcc/testsuite/
* gcc.target/aarch64/pragma_cpp_predefs_4.c: Add tests checking that
sme-f8f16 and sme-f8f32 prefefs are off by default, and checks for
feature dependencies.
* lib/target-supports.exp: Add check_effective_target support for
sme-f8f16 and sme-f8f32.

3 days agoaarch64: add multi-vector floating-point adjust exponent intrinsics
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:26 +0000 (11:41 +0000)]
aarch64: add multi-vector floating-point adjust exponent intrinsics

This patch adds the following intrinsics (all __arm_streaming only) along with
asm tests for them.

- FSCALE (multiple and single vector)
- svfloat16x2_t svscale[_single_f16_x2](svfloat16x2_t zd, svint16_t zm)
- svfloat32x2_t svscale[_single_f32_x2](svfloat32x2_t zd, svint32_t zm)
- svfloat64x2_t svscale[_single_f64_x2](svfloat64x2_t zd, svint64_t zm)
- svfloat16x4_t svscale[_single_f16_x4](svfloat16x4_t zd, svint16_t zm)
- svfloat32x4_t svscale[_single_f32_x4](svfloat32x4_t zd, svint32_t zm)
- svfloat64x4_t svscale[_single_f64_x4](svfloat64x4_t zd, svint64_t zm)

- FSCALE (multiple vectors)
- svfloat16x2_t svscale[_f16_x2](svfloat16x2_t zd, svint16x2_t zm)
- svfloat32x2_t svscale[_f32_x2](svfloat32x2_t zd, svint32x2_t zm)
- svfloat64x2_t svscale[_f64_x2](svfloat64x2_t zd, svint64x2_t zm)
- svfloat16x4_t svscale[_f16_x4](svfloat16x4_t zd, svint16x4_t zm)
- svfloat32x4_t svscale[_f32_x4](svfloat32x4_t zd, svint32x4_t zm)
- svfloat64x4_t svscale[_f64_x4](svfloat64x4_t zd, svint64x4_t zm)

Test structure is based on the urshl ones that have a similar structure in how
they treat arguments.

gcc/
* config/aarch64/aarch64-sve-builtins-base.cc (svscale_impl): Added new
class for dealing with all svscale functions (including sve)
(svscale): updated FUNCTION macro call to make use of new class.
* config/aarch64/aarch64-sve-builtins-sve2.def: (svscale):
Added new DEF_SVE_FUNCTION_GS call to enable recognition of new variant.
* config/aarch64/aarch64-sve2.md (@aarch64_sve_fscale<mode>): Added
new define_insn. (@aarch64_sve_single_fscale<mode>): Likewise.
* config/aarch64/iterators.md: (SVE_Fx24_NOBF): Added new iterator,
similar to SVE_Fx24 but without brainfloat.
(SVE_Fx24): Updated to make use of SVE_Fx24_NOBF.
(SVSCALE_SINGLE_INTARG): Added new mode_attr.
(SVSCALE_INTARG): Likewise.

gcc/testsuite/
* gcc.target/aarch64/sme2/acle-asm/scale_f16_x2.c: : Added test file.
* gcc.target/aarch64/sme2/acle-asm/scale_f16_x4.c: : Likewise.
* gcc.target/aarch64/sme2/acle-asm/scale_f32_x2.c: : Added test file.
* gcc.target/aarch64/sme2/acle-asm/scale_f32_x4.c: : Likewise.
* gcc.target/aarch64/sme2/acle-asm/scale_f64_x2.c: : Added test file.
* gcc.target/aarch64/sme2/acle-asm/scale_f64_x4.c: : Likewise.

3 days agoaarch64: add narrowing sme2 conversions to fp8
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:25 +0000 (11:41 +0000)]
aarch64: add narrowing sme2 conversions to fp8

This patch adds the following intrinsics (all __arm_streaming only) along with
asm tests for them.

BFCVT, FCVT Convert to packed 8-bit floating-point format:
- svmfloat8_t svcvt_mf8[_f16_x2]_fpm(svfloat16x2_t zn, fpm_t fpm)
- svmfloat8_t svcvt_mf8[_bf16_x2]_fpm(svbfloat16x2_t zn, fpm_t fpm)
- svmfloat8_t svcvt_mf8[_f32_x4]_fpm(svfloat32x4_t zn, fpm_t fpm)

FCVTN Convert to interleaved 8-bit floating-point format.
- svmfloat8_t svcvtn_mf8[_f32_x4]_fpm(svfloat32x4_t zn, fpm_t fpm)

gcc/
* config/aarch64/aarch64-sve-builtins-base.cc (svcvt_impl): Update to
handle fp8 cases.
* config/aarch64/aarch64-sve-builtins-sve2.def (svcvt, svcvtn): Added
DEF_SVE_FUNCTION_GS_FPM instances.
* config/aarch64/aarch64-sve2.md
(@aarch64_sve2_fp8_cvtn<mode>): Updated define_insn for additional case.
(@aarch64_sme2_fp8_cvt<mode>): Added new define_insn.
* config/aarch64/iterators.md (VNx16F_NARROW): Added new iterator to
handle narrowing SVE floating point operations.
(UNSPEC_FCVT): Added new unspec.

gcc/testsuite/
* gcc.target/aarch64/sme2/acle-asm/cvt_mf8_bf16_x2.c: Added test file.
* gcc.target/aarch64/sme2/acle-asm/cvt_mf8_f16_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/cvt_mf8_f32_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/cvtn_mf8_f32_x4.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h
(TEST_X2_NARROW): Added fpm0 argument for intrinsics.
(TEST_X4_NARROW): Likewise.

3 days agoaarch64: add widening sme2 fp8 conversions
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:25 +0000 (11:41 +0000)]
aarch64: add widening sme2 fp8 conversions

This patch adds the following intrinsics (all __arm_streaming only) along with
asm tests for them under the +sme2+fp8 flags:
- svfloat16x2_t svcvt1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvt2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvt1_bf16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvt2_bf16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvtl1_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvtl2_f16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvtl1_bf16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)
- svfloat16x2_t svcvtl2_bf16[_mf8]_x2_fpm(svmfloat8_t zn, fpm_t fpm)

gcc/
* config/aarch64/aarch64-sve-builtins-sve2.cc (svcvtl1, svcvtl2): Added
new FUNTIONs.
* config/aarch64/aarch64-sve-builtins-sve2.def
(svcvt1, svcvt2, svcvtl1, svcvtl2): Added new DEF_SVE_FUNCTION_GS_FPM.
* config/aarch64/aarch64-sve-builtins-sve2.h (svcvtl1, svcvtl2): Added
new function_base.
* config/aarch64/aarch64-sve-builtins.cc
(function_resolver::resolve_unary): use group_suffix_id when resolving
C overloads.
* config/aarch64/aarch64-sve2.md
(@aarch64_sve2_fp8_cvt_<fp8_cvt_uns_op><mode>): Added new define_insn.
* config/aarch64/aarch64.h (TARGET_SSME2_FP8): Added new define.
* config/aarch64/iterators.md
(UNSPEC_F1CVTL. UNSPEC_F2CVTL): Added new unspecs.
(FP8CVT_UNS): Extended int_iterator.
(fp8_cvt_uns_op): Likewise.

gcc/testsuite/
* g++.target/aarch64/sme2/aarch64-sme2-acle-asm.exp: Use tuning flag
to reduce churn in testsuites.
* gcc.target/aarch64/sme2/aarch64-sme2-acle-asm.exp: Likewise.
* gcc.target/aarch64/sme2/acle-asm/cvt_mf8_x2.c: Added test file.
* gcc.target/aarch64/sme2/acle-asm/cvtl_mf8_x2.c: Likewise.
* gcc.target/aarch64/sve/acle/asm/test_sve_acle.h (TEST_X2_WIDE): Added
fpm0 argument for intrinsics.

3 days agoaarch64: extend sme intrinsics to mfp8
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:25 +0000 (11:41 +0000)]
aarch64: extend sme intrinsics to mfp8

This patch extends the following intrinsics to support svmfloat8_t types and
adds tests based on the equivalent ones for svuint8_t.

SME:
- svread_hor_za8[_mf8]_m, svread_hor_za128[_mf8]_m and related ver.
- svwrite_hor_za8[_mf8]_m, svwrite_hor_za128[_mf8]_m and related ver.

SME2:
- svread_hor_za8_mf8_vg2, svread_hor_za8_mf8_vg4 and related ver.
- svwrite_hor_za8[_mf8]_vg2, svwrite_hor_za8[_mf8]_vg4 and related ver.
- svread_za8[_mf8]_vg1x2, svread_za8[_mf8]_vg1x4.
- svwrite_za8[_mf8]_vg1x2, svwrite_za8[_mf8]_vg1x4.
- svsel[_mf8_x2], svsel[_mf8_x4].
- svzip[_mf8_x2], svzip[_mf8_x4].
- svzipq[_mf8_x2], svzipq[_mf8_x4].
- svuzp[_mf8_x2], svuzp[_mf8_x4].
- svuzpq[_mf8_x2], svuzpq[_mf8_x4].
- svld1[_mf8]_x2, svld1[_mf8]_x4.
- svld1_vnum[_mf8]_x2, svld1_vnum[_mf8]_x4.

SVE2.1/SME2:
- svldnt1[_mf8]_x2, svldnt1[_mf8]_x4.
- svldnt1_vnum[_mf8]_x2, svldnt1_vnum[_mf8]_x4.
- svrevd[_mf8]_m, svrevd[_mf8]_z, svrevd[_mf8]_x.
- svst1[_mf8_x2], svst1[_mf8_x4].
- svst1_vnum[_mf8_x2], svst1_vnum[_mf8_x4].
- svstnt1[_mf8_x2], svstnt1[_mf8_x4].
- svstnt1_vnum[_mf8_x2], svstnt1_vnum[_mf8_x4].

SME2.1:
- svreadz_hor_za8_u8, svreadz_hor_za8_u8_vg2, svreadz_hor_za8_u8_vg4 and related
  ver.
- svreadz_hor_za128_u8, svreadz_ver_za128_u8.
- svreadz_za8_u8_vg1x2, svreadz_za8_u8_vg1x4.

This change follows ACLE 2024Q4.

gcc/
* config/aarch64/aarch64-sve-builtins.cc (TYPES_za_bhsd_data): Add
D (za8, mf8) combination to za_bhsd_data.

gcc/testsuite/
* gcc.target/aarch64/sme/acle-asm/revd_mf8.c: Added test file.
* gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/ld1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/ldnt1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_ver_za128.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/sel_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/sel_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/st1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/st1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/stnt1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/uzp_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/uzpq_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/zip_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/zip_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/zipq_mf8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ld1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/ldnt1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/revd_mf8.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x2.c: Likewise.
* gcc.target/aarch64/sve2/acle/asm/stnt1_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/read_hor_za128.c: Added mf8 tests.
* gcc.target/aarch64/sme/acle-asm/read_hor_za8.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/read_ver_za128.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/read_ver_za8.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/write_hor_za128.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/write_hor_za8.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/write_ver_za128.c: Likewise.
* gcc.target/aarch64/sme/acle-asm/write_ver_za8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/read_hor_za8_vg4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/read_ver_za8_vg4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/read_za8_vg1x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_hor_za128.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_hor_za8_vg4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_hor_za8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_ver_za8_vg4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_ver_za8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/readz_za8_vg1x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/write_hor_za8_vg4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/write_ver_za8_vg4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/write_za8_vg1x4.c: Likewise.

3 days agoaarch64: add tests for sme mfloat8 luti functions
Claudio Bantaloukas [Wed, 24 Dec 2025 11:41:25 +0000 (11:41 +0000)]
aarch64: add tests for sme mfloat8 luti functions

These functions could already support svmfloat8_t types but were missing tests.
This change uses the similar ones for uint8.

gcc/testsuite/
* gcc.target/aarch64/sme2/acle-asm/luti2_mf8_x2.c: New test.
* gcc.target/aarch64/sme2/acle-asm/luti2_mf8_x4.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/luti2_mf8.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/luti4_mf8_x2.c: Likewise.
* gcc.target/aarch64/sme2/acle-asm/luti4_mf8.c: Likewise.

3 days agolibgomp: Robustify effective-target 'omp_usm' check
Thomas Schwinge [Tue, 23 Dec 2025 20:45:53 +0000 (21:45 +0100)]
libgomp: Robustify effective-target 'omp_usm' check

This was added in commit 1cf9fda4936de54198858b8f54cd9707a3725f4e
"amdgcn: Adjust failure mode for gfx908 USM".

In a GCC configuration with both AMD and NVIDIA GPU code offloading supported,
and the selected AMD GPU code generation not supporting USM, but an USM-capable
NVIDIA GPU available, I see all test cases that require effective-target
'omp_usm' turn UNSUPPORTED, because:

    Executing on host: gcc  usm_available_2778376.c [...]
    [...]
    In function 'main._omp_fn.0':
    lto1: warning: Unified Shared Memory is required, but XNACK is disabled
    lto1: note: Try -foffload-options=-mxnack=any
    gcn mkoffload: warning: conflicting settings; XNACK is forced off but Unified Shared Memory is required
    UNSUPPORTED: [...]

That warning is, however, not relevant in the scenario described above: we're
not going to exercise AMD GPU code offloading at run time.

With the effective-target 'omp_usm' check robustified like this, the affected
test cases are then no longer UNSUPPORTED, but of course, there's then the
corollary issue that compilation of the test case itself now emits the very
same warning, which results in the "test for excess errors" FAILing, despite
the execution test PASSing, for example:

    FAIL: libgomp.c++/target-std__valarray-concurrent-usm.C (test for excess errors)
    PASS: libgomp.c++/target-std__valarray-concurrent-usm.C execution test

That's clearly not ideal either (but is representative of what real-world usage
would run into), but is certainly better than the whole test case turning
UNSUPPORTED.  To be continued, I guess...

libgomp/
* testsuite/lib/libgomp.exp (check_effective_target_omp_usm):
Robustify.

3 days agoifcvt: Move noce_try_cond_zero_arith last
Andrew Pinski [Tue, 23 Dec 2025 21:30:00 +0000 (13:30 -0800)]
ifcvt: Move noce_try_cond_zero_arith last

I noticed that on x86_64 and aarch64, noce_try_cond_zero_arith
would produce worse code than noce_try_cmove_arith.
So we should do noce_try_cond_zero_arith last instead
of before noce_try_cmove_arith.

Pushed as obvious after bootstrap/test on x86_64-linux-gnu.
Also checked to make sure riscv testcases still work.

gcc/ChangeLog:

* ifcvt.cc (noce_process_if_block): Move noce_try_cond_zero_arith
last.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
3 days agoifcvt: Only allow scalar integral modes for noce_try_cond_zero_arith [PR123276]
Andrew Pinski [Tue, 23 Dec 2025 21:04:28 +0000 (13:04 -0800)]
ifcvt: Only allow scalar integral modes for noce_try_cond_zero_arith [PR123276]

This is the simple fix for PR 123276 where this code can only handle scalar
integral modes. We could in theory handle scalar floating point modes here
too but it is not worth the trouble.

Pushed as obvious after bootstrap/test on x86_64-linux-gnu.

PR rtl-optimization/123276
gcc/ChangeLog:

* ifcvt.cc (noce_try_cond_zero_arith): Reject non-scalar integral modes.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
3 days agoDaily bump.
GCC Administrator [Wed, 24 Dec 2025 00:16:31 +0000 (00:16 +0000)]
Daily bump.

3 days agoc++: Non-inline temploid friends should still be COMDAT [PR122819]
Nathaniel Shead [Sun, 7 Dec 2025 12:17:15 +0000 (23:17 +1100)]
c++: Non-inline temploid friends should still be COMDAT [PR122819]

Modules allow temploid friends to no longer be implicitly inline, as
functions defined in a class body will not be implicitly inline if
attached to a named module.

This requires us to clean up linkage handling a little bit, mostly by
replacing usages of 'DECL_TEMPLATE_INSTANTIATION' with
'DECL_TEMPLOID_INSTANTIATION' when determining if an entity has vague
linkage.

This caused the friend88.C testcase to miscompile however, as 'foo' was
incorrectly having 'DECL_FRIEND_PSEUDO_TEMPLATE_INSTANTIATION' getting
set because it was keeping its tinfo.

This is because 'non_templated_friend_p' was returning 'false', since
the function didn't have a primary template.  But that's expected I
think here, so fixed by also returning true for friend declarations
pushed into namespace scope, which still allows dependent nested friends
to be considered templated.

PR c++/122819

gcc/cp/ChangeLog:

* decl.cc (start_preparsed_function): Use
DECL_TEMPLOID_INSTANTIATION instead of
DECL_TEMPLATE_INSTANTIATION to check vague linkage.
* decl2.cc (vague_linkage_p): Likewise.
(c_parse_final_cleanups): Simplify condition.
* pt.cc (non_templated_friend_p): Namespace-scope friend
function declarations without a primary template are still
non-templated.
* semantics.cc (expand_or_defer_fn_1): Also check for temploid
friend functions.

gcc/testsuite/ChangeLog:

* g++.dg/modules/tpl-friend-22.C: New test.
* g++.dg/template/friend88.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
4 days agoa68: add import from .m68 file
Mohammad-Reza Nabipoor [Tue, 23 Dec 2025 20:10:51 +0000 (21:10 +0100)]
a68: add import from .m68 file

Signed-off-by: Mohammad-Reza Nabipoor <mnabipoor@gnu.org>
gcc/algol68/ChangeLog

* a68.h (a68_file_size): Changed to use file descriptor.
(a68_file_read): Likewise.
* a68-parser-scanner.cc (a68_file_size): Likewise.
(a68_file_read): Likewise.
(read_source_file): Adapt `a68_file_{size,read}'.
(include_files): Likewise.
* a68-lang.cc (a68_handle_option): Likewise.
* a68-imports.cc (a68_find_export_data): Implement
reading from module's .m68 file if available.

gcc/testsuite/ChangeLog

* algol68/compile/modules/compile.exp (dg-data): New procedure
for writing binary test data to disk.
* algol68/compile/modules/program-m68-lp64.a68: New test which
embeds binary module data.
* algol68/compile/modules/program-m68-llp64.a68: Likewise.
* algol68/compile/modules/program-m68-ilp32.a68: Likewise.
* algol68/compile/modules/program-m68-lp64-be.a68: Likewise.
* algol68/compile/modules/program-m68-llp64-be.a68: Likewise.

4 days ago[committed][RISC-V][PR target/123274] Add missing condition in usmul<mode>3 pattern
Jeff Law [Tue, 23 Dec 2025 20:25:47 +0000 (13:25 -0700)]
[committed][RISC-V][PR target/123274] Add missing condition in usmul<mode>3 pattern

As Andrew P. noted in the BZ, the expander is missing elements in its condition
leading to generation of an insn that can't be matched.

This adds the necessary condition to the usmul<mode>3 expander which in turn
fixes the ICE.  I just checked and that expander wansn't in gcc-15, so this is
just a gcc-16 issue.

Tested on riscv32-elf and riscv64-elf.  I have a bootstrap in flight on the
Pioneer, but I'm not expecting any surprises.  Much like the patch earlier
today, I'm going to push this now rather than wait for pre-commit CI.

PR target/123274
gcc/
* config/riscv/riscv.md (usmul<mode>3): Add proper condition.

gcc/testsuite/
* gcc.target/riscv/pr123274.c: New test.

4 days ago[RISC-V][PR target/123278] Handle BF/HF modes in Andes 45 series pipeline description
Jeff Law [Tue, 23 Dec 2025 19:34:44 +0000 (12:34 -0700)]
[RISC-V][PR target/123278] Handle BF/HF modes in Andes 45 series pipeline description

So a standard run-of-the-mill case where we're testing modes to determine what
reservation to use in a pipeline model and modes were missing (BF/HF in this
case).

This adds the BF/HF cases to the fp_alu_s, fpu_mul_s and fpu_mac_s units for
the Andes 45 series.  It may ultimately be the case that even lower latencies
are available for these ops, but that's something folks with a better
understanding of the Andes 45 series uarch would need to tackle.

Tested on riscv32-elf and riscv64-elf. Given the nature of the change and the
fact that I expect to be out of the office most of the next few days, I'm going
to go ahead and push without waiting for pre-commit CI.  There's minimal risk.

PR target/123278
gcc/
* config/riscv/andes-45-series.md (andes_45_fpu_alu_s): Handle
BF/HF modes too.
(andes_45_fpu_mul_s, andes_45_fpu_mac_s): Likewise.

gcc/testsuite/
* gcc.target/riscv/pr123278.c: New test.

4 days ago[RISC-V][PATCH] Adjust clmul latency in Spacemit X60 scheduler model
Milan Tripkovic [Tue, 23 Dec 2025 16:39:41 +0000 (09:39 -0700)]
[RISC-V][PATCH] Adjust clmul latency in Spacemit X60 scheduler model

This patch adjusts the instruction scheduling and cost model for the Zbc
(CLMUL) extension on the Spacemit X60 core.
The tuning was evaluated using three configurations (CLMUL2, CLMUL3,
and the baseline CLMUL5) across a variety of hashing and encryption kernels.

| Test Case    | Met |    CLMUL2   |    CLMUL3   |  v5 (Patch) | v5/v2 | v5/v3 |
|--------------|-----|-------------|-------------|-------------|-------|-------|
| AES Hash     | ms  |     1,676.94|     1,614.35|     1,614.71| -3.71%| +0.02%|
| [5bsv8qnh1]  | cyc |2,683,008,256|2,582,866,539|2,583,483,082| -3.71%| +0.02%|
|--------------|-----|-------------|-------------|-------------|-------|-------|
| Sweet Spot   | ms  |     2,631.45|     2,631.35|     2,743.37| +4.25%| +4.26%|
| [xe9sncK87]  | cyc |4,210,294,394|4,210,083,291|4,389,331,992| +4.25%| +4.26%|
|--------------|-----|-------------|-------------|-------------|-------|-------|
| 128b Mult    | ms  |     1,639.32|     1,727.10|     1,754.90| +7.05%| +1.61%|
| [aYezqcx4n]  | cyc |2,622,877,789|2,763,259,605|2,807,789,209| +7.05%| +1.61%|
|--------------|-----|-------------|-------------|-------------|-------|-------|
| CRC32 Fold   | ms  |     2,056.78|     1,947.46|     2,120.03| +3.07%| +8.86%|
| [bdWoW9ezv]  | cyc |3,290,804,189|3,115,896,432|3,391,980,303| +3.07%| +8.86%|
|--------------|-----|-------------|-------------|-------------|-------|-------|
| Wegman Hash  | ms  |     2,160.13|     2,161.12|     2,204.77| +2.07%| +2.02%|
| [aa8aGerbe]  | cyc |3,456,154,927|3,457,644,543|3,527,588,691| +2.07%| +2.02%|
|--------------|-----|-------------|-------------|-------------|-------|-------|
Links:
[5bsv8qnh1] https://godbolt.org/z/5bsv8qnh1
[xe9sncK87] https://godbolt.org/z/xe9sncK87
[aYezqcx4n] https://godbolt.org/z/aYezqcx4n
[bdWoW9ezv] https://godbolt.org/z/bdWoW9ezv
[aa8aGerbe] https://godbolt.org/z/aa8aGerbe

Based on the benchmark results, CLMUL3 is proposed as the new default
tuning for this core.

gcc/ChangeLog:

* config/riscv/spacemit-x60.md (spacemit_x60_clmul): Adjust latency.

4 days agoc++: clarify the comment regarding where the default dialect is set
Yuao Ma [Tue, 23 Dec 2025 14:54:34 +0000 (22:54 +0800)]
c++: clarify the comment regarding where the default dialect is set

Since r6-7026-g268be88cbeaba7, the default dialect has been set in
c_common_init_options rather than c_common_post_options. This patch updates the
corresponding comment to reflect that change.

gcc/c-family/ChangeLog:

* c-common.cc: Mention c_common_init_options.

4 days agoc++: Fix member-like friend detection for non-template classes [PR122550]
Egas Ribeiro [Fri, 19 Dec 2025 21:34:55 +0000 (21:34 +0000)]
c++: Fix member-like friend detection for non-template classes [PR122550]

member_like_constrained_friend_p was incorrectly returning true for
constrained friend function templates declared in non-template classes,
causing them to be treated as distinct from their forward declarations.
This led to ambiguity errors at call sites.

Per [temp.friend]/9, a constrained friend is only "member-like" (and thus
declares a different function) in two cases:
1. Non-template friends with constraints (must be in a templated class)
2. Template friends whose constraints depend on outer template parameters

In both cases, the enclosing class scope must be templated. The fix adds
a check for CLASSTYPE_IMPLICIT_INSTANTIATION to ensure the friend's
context is actually a class template, not a plain class or explicit
specialization.

PR c++/122550

gcc/cp/ChangeLog:

* decl.cc (member_like_constrained_friend_p): Check that the
friend's enclosing class is an implicit instantiation.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/concepts-friend18.C: New test.
* g++.dg/cpp2a/concepts-friend18a.C: New test.

Signed-off-by: Egas Ribeiro <egas.g.ribeiro@gmail.com>
Reviewed-by: Patrick Palka <ppalka@redhat.com>
4 days agoc++: Fix ICE on partial specialization redeclaration with mismatched parameters ...
Egas Ribeiro [Mon, 22 Dec 2025 22:30:12 +0000 (22:30 +0000)]
c++: Fix ICE on partial specialization redeclaration with mismatched parameters [PR122958]

When a partial specialization was redeclared with different template
parameters, maybe_new_partial_specialization was incorrectly treating it
as the same specialization by only comparing template argument lists
without comparing template-heads. This caused an ICE when the
redeclaration had different template parameters.

Per [temp.spec.partial.general]/2, two partial specializations declare
the same entity only if they have equivalent template-heads and
template argument lists.
Fix by comparing template parameter lists (template-heads) in addition
to template argument lists when checking for existing specializations,
and removing flag_concepts to provide diagnostics before c++20 for the
testcase.

PR c++/122958

gcc/cp/ChangeLog:

* pt.cc (maybe_new_partial_specialization): Compare template
parameter lists when checking for existing specializations and
remove flag_concepts check.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/partial-spec-redecl.C: New test.

Signed-off-by: Egas Ribeiro <egas.g.ribeiro@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
4 days agogccrs: Adds tests from issue 4245
lenny.chiadmi-delage [Fri, 19 Dec 2025 12:40:25 +0000 (12:40 +0000)]
gccrs: Adds tests from issue 4245

Adds tests for the testsuite

gcc/testsuite/ChangeLog:

* rust/compile/issue-4245.rs: New test.

Signed-off-by: lenny.chiadmi-delage <lenny.chiadmi-delage@epita.fr>
4 days agogccrs: respect cfg_attr expansion
lenny.chiadmi-delage [Fri, 19 Dec 2025 12:34:45 +0000 (12:34 +0000)]
gccrs: respect cfg_attr expansion

Fix cfg_attr expansion and feature gate attribute handling

Fixes Rust-GCC#4245

gcc/rust/ChangeLog:

* checks/errors/feature/rust-feature-gate.cc (FeatureGate::visit): Added
handling for META_ITEM type attributes to properly process feature gates.
* expand/rust-cfg-strip.cc (expand_cfg_attrs): Fixed a bug where
newly inserted cfg_attr attributes wheren't being reprocessed,
and cleaned up the loop increment logic.

Signed-off-by: lenny.chiadmi-delage <lenny.chiadmi-delage@epita.fr>
4 days agogccrs: add unused mut lint
Lucas Ly Ba [Mon, 17 Nov 2025 16:13:33 +0000 (16:13 +0000)]
gccrs: add unused mut lint

gcc/rust/ChangeLog:

* checks/lints/unused/rust-unused-checker.cc (UnusedChecker::UnusedChecker):
Add warning for identifier pattern and field ident pattern in struct
(UnusedChecker::visit): Add methods.
* checks/lints/unused/rust-unused-checker.h: Same here.
* checks/lints/unused/rust-unused-collector.cc (UnusedCollector::UnusedCollector):
Collect unused mut variables
(UnusedCollector::visit): Add methods.
* checks/lints/unused/rust-unused-collector.h: Same here.
* checks/lints/unused/rust-unused-context.cc (UnusedContext::remove_assign):
Add methods for unused mut set.
(UnusedContext::add_mut): Same here.
(UnusedContext::remove_mut): Same here.
(UnusedContext::is_mut_used): Same here.
* checks/lints/unused/rust-unused-context.h: Same here.

gcc/testsuite/ChangeLog:

* rust/compile/unused-mut-identifier_0.rs: New test.
* rust/compile/unused-mut-struct-field_0.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 days agogccrs: change unused lint files name to unused
Lucas Ly Ba [Mon, 17 Nov 2025 13:53:14 +0000 (13:53 +0000)]
gccrs: change unused lint files name to unused

gcc/rust/ChangeLog:

* Make-lang.in: Compile the right files.
* checks/lints/unused-var/rust-unused-var-checker.cc: Move to...
* checks/lints/unused/rust-unused-checker.cc: ...here.
* checks/lints/unused-var/rust-unused-var-checker.h: Move to...
* checks/lints/unused/rust-unused-checker.h: ...here.
* checks/lints/unused-var/rust-unused-var-collector.cc: Move to...
* checks/lints/unused/rust-unused-collector.cc: ...here.
* checks/lints/unused-var/rust-unused-var-collector.h: Move to...
* checks/lints/unused/rust-unused-collector.h: ...here.
* checks/lints/unused-var/rust-unused-var-context.cc: Move to...
* checks/lints/unused/rust-unused-context.cc: ...here.
* checks/lints/unused-var/rust-unused-var-context.h: Move to...
* checks/lints/unused/rust-unused-context.h: ...here.
* rust-session-manager.cc (Session::compile_crate): Call the right method.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 days agogccrs: refactor unused var lint
Lucas Ly Ba [Fri, 14 Nov 2025 21:07:00 +0000 (21:07 +0000)]
gccrs: refactor unused var lint

gcc/rust/ChangeLog:

* checks/lints/unused-var/rust-unused-var-checker.cc (UnusedVarChecker::visit):
Change unused name warning to unused variable warning.
* checks/lints/unused-var/rust-unused-var-collector.cc (UnusedVarCollector::visit):
Remove useless methods.
* checks/lints/unused-var/rust-unused-var-collector.h: Same here.
* checks/lints/unused-var/rust-unused-var-context.cc (UnusedVarContext::add_variable):
Add used variables to set.
(UnusedVarContext::mark_used): Remove method.
(UnusedVarContext::is_variable_used):
Check if the set contains the hir id linked to a variable.
(UnusedVarContext::as_string): Refactor method for new set.
* checks/lints/unused-var/rust-unused-var-context.h: Refactor methods.
* lang.opt: Change description for unused check flag.

gcc/testsuite/ChangeLog:

* rust/compile/static_item_0.rs: Modify warning output.
* rust/compile/template_function_0.rs: Modify warning output.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 days agogccrs: add unused-assignments lint
Lucas Ly Ba [Fri, 14 Nov 2025 20:36:32 +0000 (20:36 +0000)]
gccrs: add unused-assignments lint

gcc/rust/ChangeLog:

* checks/lints/unused-var/rust-unused-var-checker.cc (UnusedVarChecker):
Implement unused assignments warning.
(UnusedVarChecker::go): Remove unique pointer unused var context.
(UnusedVarChecker::visit): Visit AssignExpr in HIR default visitor.
* checks/lints/unused-var/rust-unused-var-checker.h: Add visit method.
* checks/lints/unused-var/rust-unused-var-collector.cc (UnusedVarCollector):
Collect warnings for assignments.
(UnusedVarCollector::visit): Visit AssignExpr in HIR default visitor.
* checks/lints/unused-var/rust-unused-var-collector.h: Add visit method.
* checks/lints/unused-var/rust-unused-var-context.cc (UnusedVarContext::add_assign):
Add assignment in map.
(UnusedVarContext::remove_assign): Remove assignment in map.
(UnusedVarContext::is_variable_assigned): Check if a variable is assigned.
* checks/lints/unused-var/rust-unused-var-context.h: Add a map to stock assignments.

gcc/testsuite/ChangeLog:

* rust/compile/issue-4260_0.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 days agogccrs: implement unused variable checker on HIR.
Ryutaro Okada [Sun, 10 Aug 2025 02:24:56 +0000 (19:24 -0700)]
gccrs: implement unused variable checker on HIR.

This change moves the unused variable checker from the type resolver
to HIR. We can now use the HIR Default Visitor, and it will be much more
easier to implement other unused lints with this change.

gcc/rust/ChangeLog:

* Make-lang.in: Add new files rules in Makefile.
* lang.opt: Add new flag.
* rust-session-manager.cc (Session::compile_crate): Execute new variable checker.
* checks/lints/unused-var/rust-unused-var-checker.cc (UnusedVarChecker): Implement unused
variable checker.
* checks/lints/unused-var/rust-unused-var-checker.h (UnusedVarChecker): Implement unused
variable checker.
* checks/lints/unused-var/rust-unused-var-collector.cc (UnusedVarCollector): Implement
unused variable collector.
* checks/lints/unused-var/rust-unused-var-collector.h (UnusedVarCollector): Implement
unused variable collector.
* checks/lints/unused-var/rust-unused-var-context.cc (UnusedVarContext): Implement
unused variable context.
* checks/lints/unused-var/rust-unused-var-context.h (UnusedVarContext): Implement unused
variable context.

gcc/testsuite/ChangeLog:

* rust/compile/static_item_0.rs: New test.
* rust/compile/template_function_0.rs: New test.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 days agogccrs: Fix ICE with continue/break/return in while condition
Harishankar [Mon, 24 Nov 2025 20:41:33 +0000 (02:11 +0530)]
gccrs: Fix ICE with continue/break/return in while condition

Fixes Rust-GCC/gccrs#3977

The predicate expression must be evaluated before type checking
to ensure side effects occur even when the predicate has never type.
This prevents skipping function calls, panics, or other side effects
in diverging predicates.

Proof of fix using -fdump-tree-gimple:

__attribute__((cdecl))
struct () test::main ()
{
  struct () D.107;

  <D.101>:
  <D.103>:
  {
    <D.104>:
    {
      <D.102>:
      goto <D.102>; // Side-effect correctly preserved
      if (0 != 0) goto <D.105>; else goto <D.106>;
      <D.106>:
      {

      }
    }
    goto <D.104>;
    <D.105>:
  }
  goto <D.103>;
  return D.107;
}

gcc/rust/ChangeLog:

* backend/rust-compile-expr.cc (CompileExpr::visit): Always
evaluate predicate expression before checking for never type
to preserve side effects in while loop conditions.
* typecheck/rust-hir-type-check-expr.cc: Update handling of break/continue.

gcc/testsuite/ChangeLog:

* rust/compile/issue-3977.rs: New test.

Signed-off-by: Harishankar <harishankarpp7@gmail.com>
4 days agogccrs: refactor string methods in HIR
Lucas Ly Ba [Thu, 11 Dec 2025 18:09:12 +0000 (18:09 +0000)]
gccrs: refactor string methods in HIR

This patch changes as_string methods in HIR to to_string,
we also create a to_debug_string method at the parent class of every
HIR nodes.

gcc/rust/ChangeLog:

* backend/rust-compile-implitem.h: Change as_string to to_string.
* backend/rust-compile-type.cc (TyTyResolveCompile::visit): Likewise.
* checks/errors/rust-readonly-check.cc (ReadonlyChecker::check_variable): Likewise.
* hir/rust-hir-dump.cc (Dump::do_vis_item): Likewise.
(Dump::do_pathpattern): Likewise.
(Dump::do_typepathsegment): Likewise.
(Dump::do_baseloopexpr): Likewise.
(Dump::do_struct): Likewise.
(Dump::do_traitfunctiondecl): Likewise.
(Dump::do_externalitem): Likewise.
(Dump::do_tuplefield): Likewise.
(Dump::do_structfield): Likewise.
(Dump::visit): Likewise.
* hir/tree/rust-hir-bound-abstract.h: Likewise.
* hir/tree/rust-hir-bound.h: Likewise.
* hir/tree/rust-hir-expr-abstract.h: Likewise.
* hir/tree/rust-hir-expr.cc (OffsetOf::as_string): Likewise.
(OffsetOf::to_string): Likewise.
* hir/tree/rust-hir-expr.h: Likewise.
* hir/tree/rust-hir-generic-param.cc (ConstGenericParam::as_string): Likewise.
(ConstGenericParam::to_string): Likewise.
* hir/tree/rust-hir-generic-param.h: Likewise.
* hir/tree/rust-hir-item.h: Likewise.
* hir/tree/rust-hir-path.cc (PathInExpression::is_self): Likewise.
* hir/tree/rust-hir-path.h: Likewise.
* hir/tree/rust-hir-pattern-abstract.h: Likewise.
* hir/tree/rust-hir-pattern.h: Likewise.
* hir/tree/rust-hir-stmt.h: Likewise.
* hir/tree/rust-hir-trait-bound.h: Likewise.
* hir/tree/rust-hir-type-abstract.h: Likewise.
* hir/tree/rust-hir-type.h: Likewise.
* hir/tree/rust-hir-visibility.h: Likewise.
* hir/tree/rust-hir.cc (Crate::as_string): Likewise.
(Crate::to_string): Likewise.
(Visibility::as_string): Likewise.
(Visibility::to_string): Likewise.
(VisItem::as_string): Likewise.
(VisItem::to_string): Likewise.
(Item::as_string): Likewise.
(Item::to_string): Likewise.
(Module::as_string): Likewise.
(Module::to_string): Likewise.
(StaticItem::as_string): Likewise.
(StaticItem::to_string): Likewise.
(ExternCrate::as_string): Likewise.
(ExternCrate::to_string): Likewise.
(TupleStruct::as_string): Likewise.
(TupleStruct::to_string): Likewise.
(ConstantItem::as_string): Likewise.
(ConstantItem::to_string): Likewise.
(ImplBlock::as_string): Likewise.
(ImplBlock::to_string): Likewise.
(StructStruct::as_string): Likewise.
(StructStruct::to_string): Likewise.
(UseDeclaration::as_string): Likewise.
(UseDeclaration::to_string): Likewise.
(UseTreeGlob::as_string): Likewise.
(UseTreeGlob::to_string): Likewise.
(UseTreeList::as_string): Likewise.
(UseTreeList::to_string): Likewise.
(UseTreeRebind::as_string): Likewise.
(UseTreeRebind::to_string): Likewise.
(Enum::as_string): Likewise.
(Enum::to_string): Likewise.
(Trait::as_string): Likewise.
(Trait::to_string): Likewise.
(Union::as_string): Likewise.
(Union::to_string): Likewise.
(Function::as_string): Likewise.
(Function::to_string): Likewise.
(WhereClause::as_string): Likewise.
(WhereClause::to_string): Likewise.
(BlockExpr::as_string): Likewise.
(BlockExpr::to_string): Likewise.
(AnonConst::as_string): Likewise.
(AnonConst::to_string): Likewise.
(ConstBlock::as_string): Likewise.
(ConstBlock::to_string): Likewise.
(TypeAlias::as_string): Likewise.
(TypeAlias::to_string): Likewise.
(ExternBlock::as_string): Likewise.
(ExternBlock::to_string): Likewise.
(PathInExpression::as_string): Likewise.
(PathInExpression::to_string): Likewise.
(ExprStmt::as_string): Likewise.
(ExprStmt::to_string): Likewise.
(ClosureParam::as_string): Likewise.
(ClosureParam::to_string): Likewise.
(ClosureExpr::as_string): Likewise.
(ClosureExpr::to_string): Likewise.
(PathPattern::as_string): Likewise.
(PathPattern::to_string): Likewise.
(QualifiedPathType::as_string): Likewise.
(QualifiedPathType::to_string): Likewise.
(QualifiedPathInExpression::as_string): Likewise.
(QualifiedPathInExpression::to_string): Likewise.
(BorrowExpr::as_string): Likewise.
(BorrowExpr::to_string): Likewise.
(ReturnExpr::as_string): Likewise.
(ReturnExpr::to_string): Likewise.
(GroupedExpr::as_string): Likewise.
(GroupedExpr::to_string): Likewise.
(RangeToExpr::as_string): Likewise.
(RangeToExpr::to_string): Likewise.
(ContinueExpr::as_string): Likewise.
(ContinueExpr::to_string): Likewise.
(NegationExpr::as_string): Likewise.
(NegationExpr::to_string): Likewise.
(RangeFromExpr::as_string): Likewise.
(RangeFromExpr::to_string): Likewise.
(RangeFullExpr::as_string): Likewise.
(RangeFullExpr::to_string): Likewise.
(ArrayIndexExpr::as_string): Likewise.
(ArrayIndexExpr::to_string): Likewise.
(AssignmentExpr::as_string): Likewise.
(AssignmentExpr::to_string): Likewise.
(CompoundAssignmentExpr::as_string): Likewise.
(CompoundAssignmentExpr::to_string): Likewise.
(AsyncBlockExpr::as_string): Likewise.
(AsyncBlockExpr::to_string): Likewise.
(ComparisonExpr::as_string): Likewise.
(ComparisonExpr::to_string): Likewise.
(MethodCallExpr::as_string): Likewise.
(MethodCallExpr::to_string): Likewise.
(TupleIndexExpr::as_string): Likewise.
(TupleIndexExpr::to_string): Likewise.
(DereferenceExpr::as_string): Likewise.
(DereferenceExpr::to_string): Likewise.
(FieldAccessExpr::as_string): Likewise.
(FieldAccessExpr::to_string): Likewise.
(LazyBooleanExpr::as_string): Likewise.
(LazyBooleanExpr::to_string): Likewise.
(RangeFromToExpr::as_string): Likewise.
(RangeFromToExpr::to_string): Likewise.
(RangeToInclExpr::as_string): Likewise.
(RangeToInclExpr::to_string): Likewise.
(UnsafeBlockExpr::as_string): Likewise.
(UnsafeBlockExpr::to_string): Likewise.
(IfExpr::as_string): Likewise.
(IfExpr::to_string): Likewise.
(IfExprConseqElse::as_string): Likewise.
(IfExprConseqElse::to_string): Likewise.
(RangeFromToInclExpr::as_string): Likewise.
(RangeFromToInclExpr::to_string): Likewise.
(ErrorPropagationExpr::as_string): Likewise.
(ErrorPropagationExpr::to_string): Likewise.
(ArithmeticOrLogicalExpr::as_string): Likewise.
(ArithmeticOrLogicalExpr::to_string): Likewise.
(CallExpr::as_string): Likewise.
(CallExpr::to_string): Likewise.
(WhileLoopExpr::as_string): Likewise.
(WhileLoopExpr::to_string): Likewise.
(WhileLetLoopExpr::as_string): Likewise.
(WhileLetLoopExpr::to_string): Likewise.
(LoopExpr::as_string): Likewise.
(LoopExpr::to_string): Likewise.
(ArrayExpr::as_string): Likewise.
(ArrayExpr::to_string): Likewise.
(AwaitExpr::as_string): Likewise.
(AwaitExpr::to_string): Likewise.
(BreakExpr::as_string): Likewise.
(BreakExpr::to_string): Likewise.
(LoopLabel::as_string): Likewise.
(LoopLabel::to_string): Likewise.
(MatchArm::as_string): Likewise.
(MatchArm::to_string): Likewise.
(MatchCase::as_string): Likewise.
(MatchCase::to_string): Likewise.
(MatchCaseBlockExpr::as_string): Likewise.
(MatchCaseBlockExpr::to_string): Likewise.
(MatchCaseExpr::as_string): Likewise.
(MatchCaseExpr::to_string): Likewise.
(MatchExpr::as_string): Likewise.
(MatchExpr::to_string): Likewise.
(TupleExpr::as_string): Likewise.
(TupleExpr::to_string): Likewise.
(FunctionParam::as_string): Likewise.
(FunctionParam::to_string): Likewise.
(FunctionQualifiers::as_string): Likewise.
(FunctionQualifiers::to_string): Likewise.
(TraitBound::as_string): Likewise.
(TraitBound::to_string): Likewise.
(LifetimeParam::as_string): Likewise.
(LifetimeParam::to_string): Likewise.
(QualifiedPathInType::as_string): Likewise.
(QualifiedPathInType::to_string): Likewise.
(Lifetime::as_string): Likewise.
(Lifetime::to_string): Likewise.
(TypePath::as_string): Likewise.
(TypePath::to_string): Likewise.
(TypeParam::as_string): Likewise.
(TypeParam::to_string): Likewise.
(PathPattern::convert_to_simple_path): Likewise.
(TypePath::as_simple_path): Likewise.
(PathExprSegment::as_string): Likewise.
(PathExprSegment::to_string): Likewise.
(GenericArgs::as_string): Likewise.
(GenericArgs::to_string): Likewise.
(GenericArgsBinding::as_string): Likewise.
(GenericArgsBinding::to_string): Likewise.
(RangePattern::as_string): Likewise.
(RangePattern::to_string): Likewise.
(RangePatternBoundLiteral::as_string): Likewise.
(RangePatternBoundLiteral::to_string): Likewise.
(SlicePatternItemsNoRest::as_string): Likewise.
(SlicePatternItemsNoRest::to_string): Likewise.
(SlicePatternItemsHasRest::as_string): Likewise.
(SlicePatternItemsHasRest::to_string): Likewise.
(SlicePattern::as_string): Likewise.
(SlicePattern::to_string): Likewise.
(AltPattern::as_string): Likewise.
(AltPattern::to_string): Likewise.
(TuplePatternItemsNoRest::as_string): Likewise.
(TuplePatternItemsNoRest::to_string): Likewise.
(TuplePatternItemsHasRest::as_string): Likewise.
(TuplePatternItemsHasRest::to_string): Likewise.
(TuplePattern::as_string): Likewise.
(TuplePattern::to_string): Likewise.
(StructPatternField::as_string): Likewise.
(StructPatternField::to_string): Likewise.
(StructPatternFieldIdent::as_string): Likewise.
(StructPatternFieldIdent::to_string): Likewise.
(StructPatternFieldTuplePat::as_string): Likewise.
(StructPatternFieldTuplePat::to_string): Likewise.
(StructPatternFieldIdentPat::as_string): Likewise.
(StructPatternFieldIdentPat::to_string): Likewise.
(StructPatternElements::as_string): Likewise.
(StructPatternElements::to_string): Likewise.
(StructPattern::as_string): Likewise.
(StructPattern::to_string): Likewise.
(LiteralPattern::as_string): Likewise.
(LiteralPattern::to_string): Likewise.
(ReferencePattern::as_string): Likewise.
(ReferencePattern::to_string): Likewise.
(IdentifierPattern::as_string): Likewise.
(IdentifierPattern::to_string): Likewise.
(TupleStructItemsNoRest::as_string): Likewise.
(TupleStructItemsNoRest::to_string): Likewise.
(TupleStructItemsHasRest::as_string): Likewise.
(TupleStructItemsHasRest::to_string): Likewise.
(TupleStructPattern::as_string): Likewise.
(TupleStructPattern::to_string): Likewise.
(LetStmt::as_string): Likewise.
(LetStmt::to_string): Likewise.
(Expr::as_string): Likewise.
(Expr::to_string): Likewise.
(InferredType::as_string): Likewise.
(InferredType::to_string): Likewise.
(TypeCastExpr::as_string): Likewise.
(TypeCastExpr::to_string): Likewise.
(ImplTraitType::as_string): Likewise.
(ImplTraitType::to_string): Likewise.
(ReferenceType::as_string): Likewise.
(ReferenceType::to_string): Likewise.
(RawPointerType::as_string): Likewise.
(RawPointerType::to_string): Likewise.
(TraitObjectType::as_string): Likewise.
(TraitObjectType::to_string): Likewise.
(BareFunctionType::as_string): Likewise.
(BareFunctionType::to_string): Likewise.
(TypePathSegmentGeneric::as_string): Likewise.
(TypePathSegmentGeneric::to_string): Likewise.
(TypePathFunction::as_string): Likewise.
(TypePathFunction::to_string): Likewise.
(TypePathSegmentFunction::as_string): Likewise.
(TypePathSegmentFunction::to_string): Likewise.
(ArrayType::as_string): Likewise.
(ArrayType::to_string): Likewise.
(SliceType::as_string): Likewise.
(SliceType::to_string): Likewise.
(TupleType::as_string): Likewise.
(TupleType::to_string): Likewise.
(StructExpr::as_string): Likewise.
(StructExpr::to_string): Likewise.
(StructExprStruct::as_string): Likewise.
(StructExprStruct::to_string): Likewise.
(StructBase::as_string): Likewise.
(StructBase::to_string): Likewise.
(StructExprFieldWithVal::as_string): Likewise.
(StructExprFieldWithVal::to_string): Likewise.
(StructExprFieldIdentifierValue::as_string): Likewise.
(StructExprFieldIdentifierValue::to_string): Likewise.
(StructExprFieldIndexValue::as_string): Likewise.
(StructExprFieldIndexValue::to_string): Likewise.
(StructExprStructFields::as_string): Likewise.
(StructExprStructFields::to_string): Likewise.
(EnumItem::as_string): Likewise.
(EnumItem::to_string): Likewise.
(EnumItemTuple::as_string): Likewise.
(EnumItemTuple::to_string): Likewise.
(TupleField::as_string): Likewise.
(TupleField::to_string): Likewise.
(EnumItemStruct::as_string): Likewise.
(EnumItemStruct::to_string): Likewise.
(StructField::as_string): Likewise.
(StructField::to_string): Likewise.
(EnumItemDiscriminant::as_string): Likewise.
(EnumItemDiscriminant::to_string): Likewise.
(ExternalItem::as_string): Likewise.
(ExternalItem::to_string): Likewise.
(ExternalStaticItem::as_string): Likewise.
(ExternalStaticItem::to_string): Likewise.
(ExternalFunctionItem::as_string): Likewise.
(ExternalFunctionItem::to_string): Likewise.
(ExternalTypeItem::as_string): Likewise.
(ExternalTypeItem::to_string): Likewise.
(NamedFunctionParam::as_string): Likewise.
(NamedFunctionParam::to_string): Likewise.
(attr.as_string): Likewise.
(attr.to_string): Likewise.
(TraitItemFunc::as_string): Likewise.
(TraitItemFunc::to_string): Likewise.
(TraitFunctionDecl::as_string): Likewise.
(TraitFunctionDecl::to_string): Likewise.
(TraitItemConst::as_string): Likewise.
(TraitItemConst::to_string): Likewise.
(TraitItemType::as_string): Likewise.
(TraitItemType::to_string): Likewise.
(SelfParam::as_string): Likewise.
(SelfParam::to_string): Likewise.
(ArrayElemsCopied::as_string): Likewise.
(ArrayElemsCopied::to_string): Likewise.
(LifetimeWhereClauseItem::as_string): Likewise.
(LifetimeWhereClauseItem::to_string): Likewise.
(TypeBoundWhereClauseItem::as_string): Likewise.
(TypeBoundWhereClauseItem::to_string): Likewise.
(ArrayElemsValues::as_string): Likewise.
(ArrayElemsValues::to_string): Likewise.
(MaybeNamedParam::as_string): Likewise.
(MaybeNamedParam::to_string): Likewise.
* hir/tree/rust-hir.h: Likewise.
* rust-session-manager.cc (Session::dump_hir): Likewise.
* typecheck/rust-hir-dot-operator.cc (MethodResolver::select): Likewise.
* typecheck/rust-hir-path-probe.cc (PathProbeType::visit): Likewise.
(PathProbeType::process_enum_item_for_candiates): Likewise.
* typecheck/rust-hir-path-probe.h: Likewise.
* typecheck/rust-hir-type-check-expr.cc (emit_ambiguous_resolution_error): Likewise.
(TypeCheckExpr::visit): Likewise.
(TypeCheckExpr::resolve_fn_trait_call): Likewise.
* typecheck/rust-hir-type-check-path.cc (TypeCheckExpr::visit): Likewise.
(TypeCheckExpr::resolve_root_path): Likewise.
* typecheck/rust-hir-type-check-pattern.cc (TypeCheckPattern::visit): Likewise.
* typecheck/rust-hir-type-check-type.cc (TypeCheckType::visit): Likewise.
(TypeCheckType::resolve_root_path): Likewise.
(ResolveWhereClauseItem::visit): Likewise.
* typecheck/rust-tyty-bounds.cc: Likewise.
* typecheck/rust-tyty.cc (VariantDef::as_string): Likewise.
(FnType::as_string): Likewise.

Signed-off-by: Lucas Ly Ba <lucas.ly-ba@outlook.com>
4 days agogccrs: Check for deprecated attributes
Ashwani Kumar Kamal [Wed, 10 Dec 2025 06:58:08 +0000 (12:28 +0530)]
gccrs: Check for deprecated attributes

Deprecated attributes need to be checked and proper errors
should be produced on bad arguments.

gcc/rust/ChangeLog:

* util/rust-attributes.cc: New function to handle deprecated attribute checking

Signed-off-by: Ashwani Kumar Kamal <ashwanikamal.im421@gmail.com>
4 days agogccrs: Make some general improvements
Owen Avery [Sun, 14 Dec 2025 21:37:31 +0000 (16:37 -0500)]
gccrs: Make some general improvements

gcc/rust/ChangeLog:

* ast/rust-ast-visitor.cc (DefaultASTVisitor::visit): Visit the
generic parameters of TraitItemType.
* expand/rust-expand-visitor.h (is_derive): Remove defunct
function declaration.
* hir/rust-ast-lower-item.cc (ASTLoweringItem::visit): Remove
unnecessary copy.
* resolve/rust-name-resolver.cc (Resolver::Resolver): Skip
generating builtins for the old resolver.
* util/rust-hir-map.cc (Mappings::get_next_node_id): Detect node
id exhaustion.
* util/rust-mapping-common.h (MAX_NODEID): Add macro definition.

Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>
4 days agogccrs: fix parser error on parenthesis types
lenny.chiadmi-delage [Mon, 15 Dec 2025 14:27:17 +0000 (14:27 +0000)]
gccrs: fix parser error on parenthesis types

Do not cast parenthesised types to TraitBound types.

Fixes Rust-GCC#4148

gcc/rust/ChangeLog:

* ast/rust-path.cc (TypePath::to_trait_bound): Check if in
parenthesis.
* hir/tree/rust-hir-type.cc (ParenthesisedType::to_trait_bound):
Likewise.
* hir/tree/rust-hir.cc (TypePath::to_trait_bound): Likewise.

gcc/testsuite/ChangeLog:

* rust/compile/issue-4148.rs: Test should produce errors.

Signed-off-by: lenny.chiadmi-delage <lenny.chiadmi-delage@epita.fr>
4 days agoc++: Fix ICE with lambdas combining explicit and implicit template params [PR117518]
Egas Ribeiro [Fri, 19 Dec 2025 16:58:58 +0000 (16:58 +0000)]
c++: Fix ICE with lambdas combining explicit and implicit template params [PR117518]

When a lambda with explicit template parameters like []<int> also has
implicit template parameters from auto, and is used as a default
template argument, processing_template_parmlist remained set
from the outer template context. This caused
function_being_declared_is_template_p to incorrectly return false,
leading synthesize_implicit_template_parm to create a new template
scope instead of extending the existing one, resulting in a binding
level mismatch and an ICE in poplevel_class.

Fix by clearing processing_template_parmlist in
cp_parser_lambda_expression alongside the other parser state
save/restore operations.

PR c++/117518

gcc/cp/ChangeLog:

* parser.cc (cp_parser_lambda_expression): Clear
processing_template_parmlist when parsing lambda body.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/lambda-targ19.C: New test.

Signed-off-by: Egas Ribeiro <egas.g.ribeiro@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
4 days agoLoongArch: relax the check for --with-tune
Xi Ruoyao [Thu, 18 Dec 2025 03:39:38 +0000 (11:39 +0800)]
LoongArch: relax the check for --with-tune

Someone (via a WeChat group) reported that --with-arch=la464
--with-tune=la664 had stopped to work after commiting the LA32 support.

While this can be treated as a simple logic error (i.e. we may simply
change "loongarch64" in the case statement to an asterisk), IMO we
should just relax the check: at runtime the "unreasonable" combinations
like "-march=la64v1.0 -mtune=loongarch32" or "-march=la664 -mtune=la464"
is allowed (and the second case has been allowed for a long time), and a
combination of --with-arch=A --with-tune=T should be allowed if -march=A
-mtune=T is allowed at runtime.

Also if we consider the fact that --with-tune= and -mtune= only select a
set of heruistic parameters, such combinations may be not so
unreasonable.

gcc/

* config.gcc: Relax the check for LoongArch with_tune.

4 days agoifcvt: Fix noce_try_cond_zero_arith after get_base_reg change [PR123267]
Andrew Pinski [Tue, 23 Dec 2025 01:58:35 +0000 (17:58 -0800)]
ifcvt: Fix noce_try_cond_zero_arith after get_base_reg change [PR123267]

A few fixes are needed after the change to get_base_reg of
r16-6333-gac64ceb33bf05b. First we need to use the correct target mode
of the operand, this means if we are doing a subreg of QI mode, using
QImode for the conditional move.
Second we also need to use the original operands instead of the ones
removing the subreg still.

Pushed as obvious after a bootstrap/test on x86_64-linux-gnu.

PR rtl-optimization/123267
gcc/ChangeLog:

* ifcvt.cc (noce_try_cond_zero_arith): Pass the original operands
of a instead of the stripped off values. The mode of the operand
which is being used.

gcc/testsuite/ChangeLog:

* gcc.dg/torture/pr123267-1.c: New test.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
4 days agoAutoFDO: Implement summary information in auto-profile
Dhruv Chawla [Mon, 1 Sep 2025 10:02:40 +0000 (03:02 -0700)]
AutoFDO: Implement summary information in auto-profile

This patch aims to implement summary support in auto-profile, similar to
LLVM. The summary information stores various information about the
profile being read such as the number of functions, the maximum sample
count, the total number of samples and so on.

It also adds a section called the "detailed summary" which contains a
histogram-based calculation of the minimum execution count for a sample
needed to belong to a specific percentile of samples. This is used to
decide the hot count threshold (which can be controlled with a command
line parameter). The default is any sample belonging to the 99th percentile
being marked as hot.

This patch requires the changes from https://github.com/google/autofdo/pull/251
to work correctly.

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* auto-profile.cc (struct summary_info): New struct.
(summary_info::read): New function.
(summary_info::get_threshold_count): Likewise.
(function_instance::read_function_instance): Read
afdo_profile_info->sum_max directly from summary info.
(autofdo_source_profile::read): Set afdo_hot_bb_threshold from
param_hot_bb_count_ws_permille.
(read_profile): Call summary_info->read.
(end_auto_profile): Free afdo_summary_info.
* gcov-io.h (GCOV_TAG_AFDO_SUMMARY): New define.

4 days agoAutoFDO: Update bootstrap gcov_version to 3 and add testcases
Dhruv Chawla [Thu, 16 Oct 2025 05:17:26 +0000 (22:17 -0700)]
AutoFDO: Update bootstrap gcov_version to 3 and add testcases

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/c/ChangeLog:

* Make-lang.in: Bump GCOV version to 3.

gcc/cp/ChangeLog:

* Make-lang.in: Bump GCOV version to 3.

gcc/lto/ChangeLog:

* Make-lang.in: Bump GCOV version to 3.

gcc/testsuite/ChangeLog:

* lib/profopt.exp: Bump GCOV version to 3.
* gcc.dg/tree-prof/afdo-lto_priv-basic-0.c: New test.
* gcc.dg/tree-prof/afdo-lto_priv-basic-1.c: Likewise.
* gcc.dg/tree-prof/afdo-lto_priv-header-0.c: Likewise.
* gcc.dg/tree-prof/afdo-lto_priv-header-0.h: Likewise.
* gcc.dg/tree-prof/afdo-lto_priv-header-1.c: Likewise.
* gcc.dg/tree-prof/afdo-lto_priv-header-1.h: Likewise.

4 days agoAutoFDO: Use filenames to resolve clashing symbol names
Dhruv Chawla [Thu, 16 Oct 2025 05:17:19 +0000 (22:17 -0700)]
AutoFDO: Use filenames to resolve clashing symbol names

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* auto-profile.cc (string_table::~string_table): Update to free
original_names_map_.
(string_table::original_names_map_): New member.
(string_table::clashing_names_map_): Likewise.
(string_table::get_original_name): New function.
(string_table::read): Figure out clashes while reading.
(autofdo_source_profile::offline_external_functions): Call
get_original_name.

4 days agoAutoFDO: Implement streaming of file names from GCOV profile
Dhruv Chawla [Thu, 16 Oct 2025 05:08:23 +0000 (22:08 -0700)]
AutoFDO: Implement streaming of file names from GCOV profile

This patch requires the changes from https://github.com/google/autofdo/pull/244
to work correctly.

Signed-off-by: Dhruv Chawla <dhruvc@nvidia.com>
gcc/ChangeLog:

* auto-profile.cc (AUTO_PROFILE_VERSION): Bump to 3.
(class function_instance_descriptor): New class.
(get_normalized_path): New function.
(string_table::~string_table): Update to free filenames.
(string_table::vector_): Rename to ...
(string_table::symbol_names_): ... this.
(string_table::map_): Rename to ...
(string_table::symbol_name_map_): ... this.
(string_table::filenames_): New member.
(string_table::filename_map_): Likewise.
(string_table::symbol_to_filename_map_): Likewise.
(string_table::get_index): Update to lookup symbol_name_map_.
(string_table::get_name): Rename to ...
(string_table::get_symbol_name): ... this.
(string_table::add_name): Rename to ...
(string_table::add_symbol_name): ... this.
(string_table::get_filename): New function.
(string_table::get_filename_by_symbol): Likewise.
(string_table::get_filename_index): Likewise.
(string_table::add_filename): Likewise.
(string_table::read): Read file names from the GCOV profile.
(function_instance::offline): Call
get_function_instance_by_descriptor.
(string_table::get_cgraph_node): Call get_symbol_name and
symbol_name.
(function_instance::get_function_instance_by_decl): Likewise.
(function_instance::get_cgraph_node): Likewise.
(function_instance::merge): Likewise.
(match_with_target): Likewise.
(function_instance::match): Likewise.
(function_instance::dump): Likewise.
(function_instance::dump_inline_stack): Likewise.
(function_instance::find_icall_target_map): Likewise.
(autofdo_source_profile::offline_unrealized_inlines): Likewise.
(autofdo_source_profile::offline_external_functions): Likewise.
(function_instance::read_function_instance): Likewise.
(afdo_indirect_call):
Also call find_function_instance, add_function_instance and
remove_function_instance.
(autofdo_source_profile::read): Likewise.
(autofdo_source_profile::get_function_instance_by_decl): Call
find_function_instance.
(autofdo_source_profile::get_function_instance_by_name_index):
Rename to ...
(autofdo_source_profile::get_function_instance_by_descriptor):
... this.
(autofdo_source_profile::find_iter_for_function_instance): New
function.
(autofdo_source_profile::find_function_instance): Likewise.
(autofdo_source_profile::add_function_instance): Likewise.
(autofdo_source_profile::remove_function_instance): Likewise.

4 days agoDaily bump.
GCC Administrator [Tue, 23 Dec 2025 00:16:29 +0000 (00:16 +0000)]
Daily bump.

4 days agoAda: Fix ICE in fld_incomplete_type_of when building GtkAda with LTO (3)
Eric Botcazou [Mon, 22 Dec 2025 22:46:53 +0000 (23:46 +0100)]
Ada: Fix ICE in fld_incomplete_type_of when building GtkAda with LTO (3)

This streamlines the code by using a ternary expression.

gcc/ada/
PR ada/123060
* gcc-interface/utils.cc (update_pointer_to): Streamline.

4 days agoc++/modules: Ignore exposures in lambdas in initializers [PR122994]
Nathaniel Shead [Thu, 4 Dec 2025 13:03:46 +0000 (00:03 +1100)]
c++/modules: Ignore exposures in lambdas in initializers [PR122994]

As the PR rightly points out, a lambda is not really a declaration in
and of itself by the standard, and so a lambda only used in a context
where exposures are ignored should not itself cause an error.

This patch implements this by way of a new flag set on deps that are
first found in an ignored context.  This flag gets cleared if we ever
see the dep in a context where exposures are not ignored.  Then, while
walking a declaration with this flag set, we re-establish an ignored
context.  This is done for all decls (not just lambdas) to handle
block-scope classes as well.

Additionally, we prevent walking of attached declarations for a
DECL_MODULE_KEYED_DECLS_P entity during dependency gathering, so that we
don't think we've seen the decl at this point.  This means we may not
have an appropriate entity to stream for this walk; to prevent any
potential issues with merging we stream a NULL_TREE 'hole' in the vector
and handle this carefully on import.

This requires a small amount of testsuite adjustment because we no
longer diagnose errors we used to.  Because our ABI for inline variables
with dynamic initialization is to just do the initialization in the
module's initializer function (and importers only perform the static
initialization) we don't bother to walk the definition of inline
variables containing lambdas and so don't see the exposures, despite
us considering TU-local entities in static initializers of inline
variables being exposures (see PR c++/119551).  This is legal by the
current wording of the standard, which does not consider the definition
of any variable to be an exposure (even an inline one).

PR c++/122994

gcc/cp/ChangeLog:

* module.cc (depset::disc_bits): New flag
DB_IGNORED_EXPOSURE_BIT.
(depset::is_ignored_exposure_context): New getter.
(depset::hash::ignore_tu_local): Rename to...
(depset::hash::ignore_exposure): ...this, and make private.
(depset::hash::hash): Rename ignore_tu_local.
(depset::hash::ignore_exposure_if): New function.
(trees_out::decl_value): Don't build deps for keyed entities.
(trees_in::decl_value): Handle missing keys.
(trees_out::write_function_def): Use ignore_exposure_if.
(trees_out::write_var_def): Likewise.
(trees_out::write_class_def): Likewise.
(depset::hash::make_dependency): Set DB_IGNORED_EXPOSURE_BIT if
appropriate, or clear it otherwise.
(depset::hash::add_dependency): Rename ignore_tu_local.
(depset::hash::find_dependencies): Set ignore_exposure if in
such a context.

gcc/testsuite/ChangeLog:

* g++.dg/modules/internal-17_b.C: Use functions and internal
types rather than lambdas.
* g++.dg/modules/internal-4_b.C: Correct expected result.
* g++.dg/modules/internal-20_a.C: New test.
* g++.dg/modules/internal-20_b.C: New test.
* g++.dg/modules/internal-20_c.C: New test.
* g++.dg/modules/internal-21_a.C: New test.
* g++.dg/modules/internal-21_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
5 days agofortran [PR122957] DTIO incompatibility with -fdefault-interger-8
Steve Kargl [Mon, 22 Dec 2025 02:32:46 +0000 (18:32 -0800)]
fortran [PR122957] DTIO incompatibility with -fdefault-interger-8

The -fdefault-integer-8 option is optional to assist with legacy
fortran codes. It is not a Standard requirement and is not
compatible with the newer user defined derived type I/O.

PR fortran/122957

gcc/fortran/ChangeLog:

* interface.cc (gfc_match_generic_spec): Issue an error
so that users do not use -fdefault-integer-8 with DTIO.

gcc/testsuite/ChangeLog:

* gfortran.dg/pr122957.f90: New test.

5 days agoFortran: fix variable definition context checks for SELECT TYPE [PR123253]
Harald Anlauf [Mon, 22 Dec 2025 20:05:29 +0000 (21:05 +0100)]
Fortran: fix variable definition context checks for SELECT TYPE [PR123253]

Commit r16-6300 introduced a regression when checking the variable
definition context of SELECT TYPE variables where the selector was not a
dummy argument as the scan for the association target was too shallow.
Scan through association lists for the ultimate selector.

PR fortran/123253

gcc/fortran/ChangeLog:

* expr.cc (gfc_check_vardef_context): Replace simple check by a
scan through the association targets for a dummy argument.

gcc/testsuite/ChangeLog:

* gfortran.dg/associate_76.f90: Extended testcase.
* gfortran.dg/associate_77.f90: New test.

5 days ago[Bug 123067][V3] Fix LICM wrong code
Kugan Vivekanandarajah [Mon, 22 Dec 2025 21:28:54 +0000 (08:28 +1100)]
[Bug 123067][V3] Fix LICM wrong code

Check for partial aliasing in self write test.

gcc/ChangeLog:

2025-12-22  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

PR middle-end/123067
* tree-ssa-loop-im.cc(is_self_write): Check
load and store refer to same location.

gcc/testsuite/ChangeLog:

2025-12-22  Kugan Vivekanandarajah  <kvivekananda@nvidia.com>

PR middle-end/123067
* gcc.dg/licm-self-write-partial-alias.c: New test.

Signed-off-by: Kugan Vivekanandarajah <kvivekananda@nvidia.com>
5 days agoAda: Fix ICE in fld_incomplete_type_of when building GtkAda with LTO (2)
Eric Botcazou [Mon, 22 Dec 2025 19:50:09 +0000 (20:50 +0100)]
Ada: Fix ICE in fld_incomplete_type_of when building GtkAda with LTO (2)

The change incorrectly resets the alias set of the old pointer/reference,
which leads to the miscompilation of a few ACATS tests on some platforms.

gcc/ada/
PR ada/123060
* gcc-interface/utils.cc (update_pointer_to): Preserve the alias
sets present on the old pointer and old reference, if any.

5 days agoa68: fix handling of underscores in PARSE_INDICANT
Jose E. Marchesi [Mon, 22 Dec 2025 19:39:37 +0000 (20:39 +0100)]
a68: fix handling of underscores in PARSE_INDICANT

Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog

* a68-imports.cc (PARSE_INDICANT): Fix handling of uderscore
characters.

gcc/testsuite/ChangeLog

* algol68/execute/modules/Modules20.map (module-bar): Add
underscores.

5 days agolibstdc++/doc: Document generate_canonical and variant compat macros.
Tomasz Kamiński [Mon, 22 Dec 2025 10:53:45 +0000 (11:53 +0100)]
libstdc++/doc: Document generate_canonical and variant compat macros.

The _GLIBCXX_USE_OLD_GENERATE_CANONICAL was introduced by
r16-6177-g866bc8a9214b1d that implemented P0952R2 [1] resolution
for LWG2524 as DR against C++20.

The _GLIBCXX_USE_VARIANT_CXX17_OLD_ABI was introduced by
r16-6301-gb3c167b61fd75f that resovled PR112591.

[1] https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2023/p0952r2.html

libstdc++-v3/ChangeLog:

* doc/html/manual/using_macros.html: Regenerate.
* doc/xml/manual/using.xml: Add entries for
_GLIBCXX_USE_OLD_GENERATE_CANONICAL and
_GLIBCXX_USE_VARIANT_CXX17_OLD_ABI.

Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
5 days agoAda: Fix bogus component visibility error for class-wide type in generic
Eric Botcazou [Mon, 22 Dec 2025 17:50:59 +0000 (18:50 +0100)]
Ada: Fix bogus component visibility error for class-wide type in generic

The problem is that Analyze_Overloaded_Selected_Component does:

            --  If the prefix is a class-wide type, the visible components
            --  are those of the base type.

            if Is_Class_Wide_Type (T) then
               T := Etype (T);
            end if;

and Resolve_Selected_Component does:

               --  The visible components of a class-wide type are those of
               --  the root type.

               if Is_Class_Wide_Type (T) then
                  T := Etype (T);
               end if;

while Analyze_Selected_Component does:

      --  For class-wide types, use the entity list of the root type

      if Is_Class_Wide_Type (Prefix_Type) then
         Type_To_Use := Root_Type (Prefix_Type);
      end if;

when faced with a selected component.  So the 3rd goes to the root type, the
1st to the base type, and the 2nd wants to do like the 3rd but ends up doing
like the 1st!  This does not change anything for the class-wide type itself,
but does for its class-wide subtypes.  The correct processing is the 3rd.

gcc/ada/
PR ada/123185
* sem_ch4.adb (Analyze_Overloaded_Selected_Component): Go to the
root when the prefix has a class-wide type.
* sem_res.adb (Resolve_Selected_Component): Likewise.

gcc/testsuite/
* gnat.dg/specs/class_wide1.ads: New test.

5 days ago[RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent...
Jeff Law [Mon, 22 Dec 2025 17:54:05 +0000 (10:54 -0700)]
[RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes

Surya's recent patch for hard register propagation has caused regressions on
the RISC-V port for the various spill-* testcases.  After reviewing the newer
generated code it was clear the new code was worse.

The core problem is we have a copy insn that is not frame related (and should
not be frame related) and a use of the destination of the copy in an insn that
is frame related.  Prior to Surya's change we could propagate away the copy,
but not anymore.

Ideally we'd just avoid generating the copy entirely, but the structure of the
code to legitimize a poly_int isn't well suited for that.  So instead we have
the code signal that it created a trivial copy and we try to optimize the code
after creation, but well before regcprop would have run.  That fixes the code
quality aspect of the regression.  In fact, it looks like the code can at times
be slightly better, but I didn't track down the precise reason why we were able
to re-use the read of VLEN so much better then before.

The optimization step is pretty simple. When it's been signaled that a copy was
generated, look back one insn and change it from writing the scratch register
to write the final destination instead.

That triggers the need to generalize the testcases so that they don't use
specific registers.  We can also see the csr reads of the VLEN register getting
CSE'd more often in those testcases, so they're adjusted for that change as
well.  There's some hope this will improve spill code more generally -- I
haven't really evaluated that, but I do know that when we spill vector
registers, the resulting code seems to have a lot of redundant VLEN reads.

Anyway, bootstrapped and regression tested on riscv (BPI and Pioneer).  It's
also been through rv32 and rv64 regression testing.  It doesn't fix all the
regressions for RISC-V on the trunk because (of course) something new got
introduced this week ;(

[ This is the spill-7 part of my last commit.  After reviewing the logs from
  the pre-commit system, it's good.  ]

gcc/testsuite
* gcc.target/riscv/rvv/base/spill-7.c: Update expected output.

5 days agoc++: fix function body cloning when using implicit constexpr
Yuao Ma [Mon, 22 Dec 2025 16:40:54 +0000 (00:40 +0800)]
c++: fix function body cloning when using implicit constexpr

When using implicit constexpr, we should not discard the function body, as it
can result in ICE during constant evaluation.

PR c++/123261

gcc/cp/ChangeLog:

* semantics.cc (expand_or_defer_fn_1): Use maybe_constexpr_fn.

gcc/testsuite/ChangeLog:

* g++.dg/ext/fimplicit-constexpr2.C: New test.

5 days agoifcvt: cond zero arith: handle subreg for shift count
Vineet Gupta [Mon, 22 Dec 2025 16:54:10 +0000 (08:54 -0800)]
ifcvt: cond zero arith: handle subreg for shift count

Some backends, RISC-V included, wrap shift counts in subreg which
current cond zero arith wasn't handling.

This came up up when looking at the original submission of cond zero
arith which did handle subregs but then was omitted to for initial
simplicity and then got lost along the way.

gcc/ChangeLog:

* ifcvt.cc (get_base_reg): Handle subreg.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/zicond_ifcvt_opt.c: Adjust increased czero counts.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
5 days agoifcvt: cond zero arith: elide short forward branch for signed GE 0 comparison [PR122769]
Vineet Gupta [Mon, 22 Dec 2025 16:54:06 +0000 (08:54 -0800)]
ifcvt: cond zero arith: elide short forward branch for signed GE 0 comparison [PR122769]

             Before            After
      ---------------------+----------------------
        bge a0,zero,.L2    | slti      a0,a0,0
                           | czero.eqz a0,a0,a0
        xor a1,a1,a3       | xor       a0,a0,a0
      .L2                  |
        mv  a0,a1          |
        ret                | ret

This is what all the prev NFC patches have been preparing to get to.

Currently the cond arith code only handles EQ/NE zero conditions missing
ifcvt optimization for cases such as GE zero, as show in example above.
This is due to the limitation of noce_emit_czero () so switch to
noce_emit_cmove () which can handle conditions other than EQ/NE and
if needed generate additional supporting insns such as SLT.

This also allows us to remove the constraint at the entry to limit to EQ/NE
conditions, improving ifcvt outcomes in general.

PR target/122769

gcc/ChangeLog:

* ifcvt.cc (noce_try_cond_zero_arith): Use noce_emit_cmove.
Delete noce_emit_czero () no longer used.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/pr122769.c: New test.

Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
5 days agoifcvt: cond zero arith: re-expand output pattern [NFC]
Vineet Gupta [Mon, 22 Dec 2025 16:52:33 +0000 (08:52 -0800)]
ifcvt: cond zero arith: re-expand output pattern [NFC]

Current code assigns the new czero insn into XEXP(a, 0) which feels
like a kludge. Instead use expand_simple_binop to recreate it.

gcc/ChangeLog:

* ifcvt.cc (noce_try_cond_zero_arith): Use expand_simple_binop
to re-expand the final pattern.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
5 days agoifcvt: cond zero arith: factor out common noce_emit_czero emit calls [NFC]
Vineet Gupta [Mon, 22 Dec 2025 16:52:19 +0000 (08:52 -0800)]
ifcvt: cond zero arith: factor out common noce_emit_czero emit calls [NFC]

The ultimate goal is to replace noce_emit_czero () with a different helper
which allows more conditions to be handled.

gcc/ChangeLog:

* ifcvt.cc (noce_try_cond_zero_arith): Refactor.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
5 days agoifcvt: cond zero arith: opencode helper noce_bbs_ok_for_cond_zero_arith [NFC]
Vineet Gupta [Mon, 22 Dec 2025 16:52:07 +0000 (08:52 -0800)]
ifcvt: cond zero arith: opencode helper noce_bbs_ok_for_cond_zero_arith [NFC]

This makes the code more readable by eliminating a bunch of pointer
intermediaries which obfuscate if_info items needed later in
noce_try_cond_zero_arith (). And while here add some top level comments
about what cond zero arith actually does.

gcc/ChangeLog:

* ifcvt.cc (noce_bbs_ok_for_cond_zero_arith): Move logic out.
(noce_try_cond_zero_arith): Into here.

Signed-off-by: Vineet Gupta <vineetg@rivosinc.com>
5 days ago[RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent...
Jeff Law [Mon, 22 Dec 2025 16:47:26 +0000 (09:47 -0700)]
[RISC-V][V2] Improve spill code for RVV slightly to fix regressions after recent changes

Surya's recent patch for hard register propagation has caused regressions on
the RISC-V port for the various spill-* testcases.  After reviewing the newer
generated code it was clear the new code was worse.

The core problem is we have a copy insn that is not frame related (and should
not be frame related) and a use of the destination of the copy in an insn that
is frame related.  Prior to Surya's change we could propagate away the copy,
but not anymore.

Ideally we'd just avoid generating the copy entirely, but the structure of the
code to legitimize a poly_int isn't well suited for that.  So instead we have
the code signal that it created a trivial copy and we try to optimize the code
after creation, but well before regcprop would have run.  That fixes the code
quality aspect of the regression.  In fact, it looks like the code can at times
be slightly better, but I didn't track down the precise reason why we were able
to re-use the read of VLEN so much better then before.

The optimization step is pretty simple. When it's been signaled that a copy was
generated, look back one insn and change it from writing the scratch register
to write the final destination instead.

That triggers the need to generalize the testcases so that they don't use
specific registers.  We can also see the csr reads of the VLEN register getting
CSE'd more often in those testcases, so they're adjusted for that change as
well.  There's some hope this will improve spill code more generally -- I
haven't really evaluated that, but I do know that when we spill vector
registers, the resulting code seems to have a lot of redundant VLEN reads.

Anyway, bootstrapped and regression tested on riscv (BPI and Pioneer).  It's
also been through rv32 and rv64 regression testing.  It doesn't fix all the
regressions for RISC-V on the trunk because (of course) something new got
introduced this week ;(

I didn't include the spill-7.c change from either version of the patch.  It
didn't fix the regression in pre-commit CI, so I'll chase that down
independently.

gcc/
* config/riscv/riscv.cc (riscv_expand_mult_with_const_int): Signal
when this creates a simple copy that may be optimized.
(riscv_legitimate_poly_move): Try to optimize away any copy created
by riscv_expand_mult_with_const_int.

gcc/testsuite
* gcc.target/riscv/rvv/base/spill-1.c: Update expected output.
* gcc.target/riscv/rvv/base/spill-2.c: Likewise.
* gcc.target/riscv/rvv/base/spill-3.c: Likewise.
* gcc.target/riscv/rvv/base/spill-4.c: Likewise.
* gcc.target/riscv/rvv/base/spill-5.c: Likewise.
* gcc.target/riscv/rvv/base/spill-6.c: Likewise.

5 days agoa68: fix a68_file_size
Mohammad-Reza Nabipoor [Sat, 20 Dec 2025 21:40:03 +0000 (22:40 +0100)]
a68: fix a68_file_size

Fix description of function, and invocation of lseek.

Signed-off-by: Mohammad-Reza Nabipoor <mnabipoor@gnu.org>
gcc/algol68/ChangeLog

* a68-parser-scanner.cc (a68_file_size): Fix comment to mention
it accepts `FILE *' and not file descriptor.
Fix invocation of `lseek' to correctly revert position of file
offset to previous one.

5 days agodocs: Document --param=memtag-instrument-mem-intrinsics
Filip Kastl [Mon, 22 Dec 2025 12:31:36 +0000 (13:31 +0100)]
docs: Document --param=memtag-instrument-mem-intrinsics

Add --param=memtag-instrument-mem-intrinsics to invoke.texi since that
wasn't done when the param got introduced.

Committing as obvious.

gcc/ChangeLog:

* doc/invoke.texi: Document
--param=memtag-instrument-mem-intrinsics

Signed-off-by: Filip Kastl <fkastl@suse.cz>
5 days agos390: testsuite: Honor deprecation warning vec-addc-u128.c
Stefan Schulze Frielinghaus [Mon, 22 Dec 2025 12:06:48 +0000 (13:06 +0100)]
s390: testsuite: Honor deprecation warning vec-addc-u128.c

gcc/testsuite/ChangeLog:

* gcc.target/s390/zvector/vec-addc-u128.c: Honor deprecation
warning.

5 days agolibgomp.fortran/uses_allocators_1.f90: Fix dg-error for r16-6273
Tobias Burnus [Mon, 22 Dec 2025 09:57:11 +0000 (10:57 +0100)]
libgomp.fortran/uses_allocators_1.f90: Fix dg-error for r16-6273

Missed to commit dg-error changes for the new diagnostic due to commit
r16-6273-g7044071f07d763   OpenMP: uses_allocators with ';'-separated list

libgomp/ChangeLog:

* testsuite/libgomp.fortran/uses_allocators_1.f90: Update dg-error.

5 days agoDaily bump.
GCC Administrator [Mon, 22 Dec 2025 00:16:25 +0000 (00:16 +0000)]
Daily bump.

6 days agofortran: fix testsuite regression for gfortran.dg/value_9.f90 [PR123201]
Harald Anlauf [Sun, 21 Dec 2025 22:03:28 +0000 (23:03 +0100)]
fortran: fix testsuite regression for gfortran.dg/value_9.f90 [PR123201]

Commit r16-3499 introduced a regression on targets where truncation of a
string argument passed to a CHARACTER(len=1),VALUE dummy argument missed
the special treatment needed for passing single characters.

PR fortran/123201

gcc/fortran/ChangeLog:

* trans-expr.cc (conv_dummy_value): Convert string of length 1 to a
single character for passing as actual argument.

6 days agofortran: [PR121472] Fix ICE with constructor for finalized zero-size type.
Jerry DeLisle [Sun, 21 Dec 2025 21:33:15 +0000 (13:33 -0800)]
fortran: [PR121472] Fix ICE with constructor for finalized zero-size type.

When a derived type has a final subroutine and a constructor interface,
but is effectively zero-sized, the gimplifier fails on the finalization
code.  The existing check for empty types (!derived->components) only
catches completely empty types, not types with empty components.
Replace with a tree-level TYPE_SIZE_UNIT check that catches all
zero-size cases.

PR fortran/121472

gcc/fortran/ChangeLog:

* trans.cc (gfc_finalize_tree_expr): Replace !derived->components
check with TYPE_SIZE_UNIT check for zero-size types.

gcc/testsuite/ChangeLog:

* gfortran.dg/pr121472.f90: New test.

6 days agofortran: [PR121475] Function result not finalized.
Jerry DeLisle [Sat, 20 Dec 2025 21:16:13 +0000 (13:16 -0800)]
fortran: [PR121475] Function result not finalized.

PR fortran/121475

gcc/fortran/ChangeLog:

* trans.cc (gfc_finalize_tree_expr): Add logic to allow the
function result to be resolved in resolve.cc
(generate_component_assignments).

gcc/testsuite/ChangeLog:

* gfortran.dg/pr121475.f90: New test as posted in the PR
from Christopher Albert

Signed-off-by: Andrew Benson <abensonca@gcc.gnu.org>
6 days agofortran, openmp: Add default case to trans-openmp switch in order to avoid -Wmaybe...
Tamar Christina [Sun, 21 Dec 2025 16:03:00 +0000 (16:03 +0000)]
fortran, openmp: Add default case to trans-openmp switch in order to avoid -Wmaybe-uninitialized warning

Similar to g:67356e61bd58ed17e4d5e67624a17a39e592fb5d
this adds a default case such that we don't get a warning on
type being used uninitialized.

This fixes the armhf bootstrap.

gcc/fortran/ChangeLog:

* trans-openmp.cc (gfc_trans_omp_clauses): Add default to switch.

6 days agomaintainer-scripts: Avoid web redirects from Sphinx stylesheets
Gerald Pfeifer [Sun, 21 Dec 2025 15:00:52 +0000 (23:00 +0800)]
maintainer-scripts: Avoid web redirects from Sphinx stylesheets

Replace the respective links by purely textual representations.

maintainer-scripts:
* update_web_docs_git: Avoid redirects from Sphinx stylesheets.

6 days agolibgccjit: Fix test-cold-attribute.c
Antoni Boucher [Thu, 4 Dec 2025 16:06:07 +0000 (11:06 -0500)]
libgccjit: Fix test-cold-attribute.c

gcc/testsuite/ChangeLog:

* jit.dg/all-non-failing-tests.h: Update comment about
test-cold-attribute.c.
* jit.dg/test-cold-attribute.c: Use -Oz to fix test.

6 days agovect: use wider precision type for generating early break scalar IV [PR123089]
Tamar Christina [Sun, 21 Dec 2025 08:27:13 +0000 (08:27 +0000)]
vect: use wider precision type for generating early break scalar IV [PR123089]

In the PR we see that the new scalar IV tricks other passes to think there's an
overflow to the use of a signed counter:

The loop is known to iterate 8191 times and we have a VF of 8 and it starts
at 2.

The codegen out of the vectorizer is the same as before, except we now have a
scalar variable counting the scalar iteration count vs a vector one.

i.e. we have

_45 = _39 + 8;

vs

_46 = _45 + { 16, 16, 16, 16, ... }

we pick a lower VF now since costing allows it to but that's not important.

When we get to cunroll since the value is now scalar, it sees that 8 * 8191
would overflow a signed short and so it changes the loop bounds to the largest
possible signed value and then uses this to elide the ivtmp_50 < 8191 as always
true and so you get an infinite loop:

Analyzing # of iterations of loop 1
  exit condition [1, + , 1](no_overflow) < 8191
  bounds on difference of bases: 8190 ... 8190
  result:
    # of iterations 8190, bounded by 8190
Statement (exit)if (ivtmp_50 < 8191)
 is executed at most 8190 (bounded by 8190) + 1 times in loop 1.
Induction variable (signed short) 8 + 8 * iteration does not wrap in statement
_45 = _39 + 8;
 in loop 1.
Statement _45 = _39 + 8;
 is executed at most 4094 (bounded by 4094) + 1 times in loop 1.

The signed type was originally chosen because of the negative offset we use when
adjusting for peeling for alignments with masks.  However this then introduces
issues as we see here with signed overflow.  This patch instead determines the
smallest possible unsigned type for use by the scalar IV where the overflow
won't happen when we include the extra bit for the sign. i.e. if the scalar IV
is an unsigned 8 bit value we pick a signed 16-bit type.  But if a signed 8-bit
value we pick a unsigned 8 bit type.

We use the initial niters value to determine the smallest size possible, to
prevent certain cases like when the IV in code is a 64-bit to need a TImode
counter.  I also only require the additional bit when I know we'll be generating
the SMAX.  I've now moved this to vectorizable_early_exit such that if we do
end up needing something like TImode that we don't vectorize if the target
doesn't support it.

I've also added some testcases for masking around the boundary values.  I've
only added them for char to reduce the runtime of the tests.

gcc/ChangeLog:

PR tree-optimization/123089
* tree-vect-loop.cc (vect_update_ivs_after_vectorizer_for_early_breaks):
Add conversion if required, Note that if we did truncate the original
scalar loop had an overflow here anyway.
(vect_get_max_nscalars_per_iter): Expose.
* tree-vect-stmts.cc (vect_compute_type_for_early_break_scalar_iv): New.
(vectorizable_early_exit): Find smallest type where we won't have UB in
the signed IV and store it.
* tree-vectorizer.h (LOOP_VINFO_EARLY_BRK_IV_TYPE): New.
(class _loop_vec_info): Add early_break_iv_type.
(vect_min_prec_for_max_niters): New.
* tree-vect-loop-manip.cc (vect_do_peeling): Use it.

gcc/testsuite/ChangeLog:

PR tree-optimization/123089
* gcc.dg/vect/vect-early-break_141-pr123089.c: New test.
* gcc.target/aarch64/sve/peel_ind_14.c: New test.
* gcc.target/aarch64/sve/peel_ind_14_run.c: New test.
* gcc.target/aarch64/sve/peel_ind_15.c: New test.
* gcc.target/aarch64/sve/peel_ind_15_run.c: New test.
* gcc.target/aarch64/sve/peel_ind_16.c: New test.
* gcc.target/aarch64/sve/peel_ind_16_run.c: New test.
* gcc.target/aarch64/sve/peel_ind_17.c: New test.
* gcc.target/aarch64/sve/peel_ind_17_run.c: New test.

6 days agoc++: adjust comment to align with new default c++20
Yuao Ma [Sun, 21 Dec 2025 06:11:47 +0000 (14:11 +0800)]
c++: adjust comment to align with new default c++20

After r16-5628-g004438857554f4, the default C++ standard is now c++20. Update
the comment here accordingly.

gcc/c-family/ChangeLog:

* c-common.h (enum cxx_dialect): c++17 to c++20.

6 days agoDaily bump.
GCC Administrator [Sun, 21 Dec 2025 00:16:24 +0000 (00:16 +0000)]
Daily bump.

7 days agoextension: Fix documentation for __builtin_*_overflow_p [PR123222]
Andrew Pinski [Sat, 20 Dec 2025 20:00:36 +0000 (12:00 -0800)]
extension: Fix documentation for __builtin_*_overflow_p [PR123222]

This fixes the copy-and-pasto for these builtins.
Basically the documentation currently says "addition" as that was copied from
__builtin_add_overflow documentation but really it should say corresponding operation
instead.

Pushed as obvious.

PR middle-end/123222
gcc/ChangeLog:

* doc/extend.texi: Fix copy-and-pasto for __builtin_*_overflow_p.

Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
7 days agoa68: fix layout of incomplete types
Jose E. Marchesi [Sat, 20 Dec 2025 14:59:50 +0000 (15:59 +0100)]
a68: fix layout of incomplete types

Apparently there is some case where the c_union of an union may be
incomplete and the containing union complete.  At this point I don't
fully understand how is that possible and the layering out of modes
should probably be rethinked, but for now fix this corner case.

Signed-off-by: Jose E. Marchesi <jemarch@gnu.org>
gcc/algol68/ChangeLog

* a68-low-moids.cc (a68_lower_moids): Fix for layout of
incomplete types.

7 days agoc++: Implement dependent ADL for use with modules
Nathaniel Shead [Fri, 14 Nov 2025 23:34:36 +0000 (10:34 +1100)]
c++: Implement dependent ADL for use with modules

[module.global.frag] p3.3 says "A declaration D is decl-reachable from a
declaration S in the same translation unit if ... S contains a dependent
call E ([temp.dep]) and D is found by any name lookup performed for an
expression synthesized from E by replacing each type-dependent argument
or operand with a value of a placeholder type with no associated
namespaces or entities".

This requires doing partial ADL ondependent calls, in case there are
non-dependent arguments that would cause new functions to become
decl-reachable.  This patch implements this with an additional lookup
during modules streaming to find any such entities.

This causes us to do ADL in more circumstances; this means also that we
might instantiate templates in cases we didn't use to.  This could cause
issues given we have already started our modules walk at this point, or
break any otherwise valid existing code.  To fix this patch adds a flag
to do a "tentative" ADL pass which doesn't attempt to complete any types
(and hence cause instantiations to occur); this means that we might miss
some associated entities however.  During a tentative walk we can also
skip entities that we know won't contribute to the missing
decl-reachable set, as an optimisation.

One implementation limitation is that both modules tree walking and
name lookup marks tree nodes as TREE_VISITED for different purposes; to
avoid conflicts this patch caches calls that will require lookup in a
separate worklist to be processed after the walk is done.

PR c++/122712

gcc/cp/ChangeLog:

* module.cc (depset::hash::dep_adl_info): New type.
(depset::hash::dep_adl_entity_list): New work list.
(depset::hash::hash): Create it.
(depset::hash::~hash): Release it.
(trees_out::tree_value): Cache possibly dependent
calls during tree walk.
(depset::hash::add_dependent_adl_entities): New function.
(depset::hash::find_dependencies): Process cached entities.
* name-lookup.cc (name_lookup::tentative): New member.
(name_lookup::name_lookup): Initialize it.
(name_lookup::preserve_state): Propagate tentative from previous
lookup.
(name_lookup::adl_namespace_fns): Don't search imported bindings
during tentative lookup.
(name_lookup::adl_class): Don't attempt to complete class types
during tentative lookup.
(name_lookup::search_adl): Skip type-dependent args and avoid
unnecessary work during tentative lookup.
(lookup_arg_dependent): Add tentative parameter.
* name-lookup.h (lookup_arg_dependent): Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/modules/adl-12_a.C: New test.
* g++.dg/modules/adl-12_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
7 days agoc++: Ignore access in is_implicit_lifetime trait decisions [PR122690]
Jakub Jelinek [Sat, 20 Dec 2025 11:04:36 +0000 (12:04 +0100)]
c++: Ignore access in is_implicit_lifetime trait decisions [PR122690]

I've implemented the non-aggregate part of is_implicit_lifetime
paper according to the paper's comment how it can be implemented, i.e.
the std::conjunction from
template<typename T>
struct is_implicit_lifetime : std::disjunction<
    std::is_scalar<T>,
    std::is_array<T>,
    std::is_aggregate<T>,
    std::conjunction<
        std::is_trivially_destructible<T>,
        std::disjunction<
            std::is_trivially_default_constructible<T>,
            std::is_trivially_copy_constructible<T>,
            std::is_trivially_move_constructible<T>>>> {};
in the paper.  But as reported in PR122690, the actual wording in the
paper is different from that, the
https://eel.is/c++draft/class.prop#16.2 part of it:
"it has at least one trivial eligible constructor and a trivial,
non-deleted destructor" doesn't talk anything about accessibility
of those ctors or dtors, only triviality, not being deleted and eligibility.
My understanding is that GCC handles the last 2 bullets of
https://eel.is/c++draft/special#6 by not adding ctors ineligible because
of those into the overload at all, and for testing deleted cdtors
I need to lazily declare them in case such synthetization makes them
deleted.
So, this patch first checks for the easy cases (where the flags on the
type say the dtor is non-trivial or all the 3 special member ctors are
non-trivial) and if not, lazily declares them if needed and checks if they
are trivial and non-deleted.

2025-12-20  Jakub Jelinek  <jakub@redhat.com>

PR c++/122690
* tree.cc (implicit_lifetime_type_p): Don't test is_trivially_xible,
instead try to lazily declare dtor and default, copy and move ctors
if needed and check for their triviality and whether they are
deleted.

* g++.dg/ext/is_implicit_lifetime2.C: New test.

7 days agoi386: Fix up handling of some -mno-avx512* options [PR123216]
Jakub Jelinek [Sat, 20 Dec 2025 10:59:19 +0000 (11:59 +0100)]
i386: Fix up handling of some -mno-avx512* options [PR123216]

This PR is about -mavx10.2 -mno-avx512vl ICE on some builtin.
Though, because -mavx10.2 implies -mavx512vl (among many others), the
pattern is right and doesn't need to care about such weird cases.

What is wrong is the handling of -mno-avx512vl and various other options,
that should unset -mavx10.1 and that should unset -mavx10.2, but it doesn't.

I went through various ISAs which 10.1 or 10.2 implies, looking for the
ISA{,2}_*_SET and corresponding ISA{,2}_*_UNSET macros and their use or lack
thereof.
Here is what I found.
OPTION_MASK_ISA_AVX512FP16_UNSET has been incorrectly defined (avx512fp16
implies avx512bw, not the other way around), but fortunately wasn't used.
And then various ISAs implied by -mavx10.1 (except for -mavx512f which was
correct) missed clearing -mavx10.{1,2} on -mno-* handling.

As mentioned in the PR, it would be really nice to add some verification of
the set and unset macros to verify consistency.

2025-12-20  Jakub Jelinek  <jakub@redhat.com>

PR target/123216
* common/config/i386/i386-common.cc (OPTION_MASK_ISA_AVX512FP16_UNSET):
Remove unused macro.
(OPTION_MASK_ISA2_AVX512FP16_UNSET, OPTION_MASK_ISA2_AVX512BF16_UNSET,
OPTION_MASK_ISA2_AVX512BW_UNSET): Or in OPTION_MASK_ISA2_AVX10_1_UNSET.
(OPTION_MASK_ISA2_AVX512CD_UNSET, OPTION_MASK_ISA2_AVX512DQ_UNSET,
OPTION_MASK_ISA2_AVX512VL_UNSET, OPTION_MASK_ISA2_AVX512IFMA_UNSET,
OPTION_MASK_ISA2_AVX512VNNI_UNSET,
OPTION_MASK_ISA2_AVX512VPOPCNTDQ_UNSET,
OPTION_MASK_ISA2_AVX512VBMI_UNSET, OPTION_MASK_ISA2_AVX512VBMI2_UNSET,
OPTION_MASK_ISA2_AVX512BITALG_UNSET): Define.
(ix86_handle_option): For
-mno-avx512{cd,dq,vl,ifma,vnni,vpopcntdq,vbmi,vbmi2,bitalg} also remove
corresponding OPTION_MASK_ISA2_AVX512*_UNSET from ix86_isa_flags2
and add it to ix86_isa_flags2_explicit.

7 days agoi386: Fix up expansion of 2 keylocker and one user_msr builtin [PR123217]
Jakub Jelinek [Sat, 20 Dec 2025 10:58:25 +0000 (11:58 +0100)]
i386: Fix up expansion of 2 keylocker and one user_msr builtin [PR123217]

target can be especially at -O0 a MEM, not just a REG, and most of the
ix86_expand_builtin spots which use target and can't support MEM
destinations deal with it properly, except these 3 spots don't.

Fixed thusly, when we change target to a new pseudo, the caller will
take care of storing that pseudo into the MEM, and this is the
solution other spots with similar requirements use in the function.

2025-12-20  Jakub Jelinek  <jakub@redhat.com>

PR target/123217
* config/i386/i386-expand.cc (ix86_expand_builtin)
<case IX86_BUILTIN_ENCODEKEY128U32, case IX86_BUILTIN_ENCODEKEY256U32,
case IX86_BUILTIN_URDMSR>: Set target to a new pseudo even if it is
non-NULL but doesn't satisfy register_operand predicate.

* gcc.target/i386/keylocker-pr123217.c: New test.
* gcc.target/i386/user_msr-pr123217.c: New test.

7 days agoDaily bump.
GCC Administrator [Sat, 20 Dec 2025 00:16:42 +0000 (00:16 +0000)]
Daily bump.

7 days agovect: Fix dominator update [PR123152]
Victor Do Nascimento [Wed, 17 Dec 2025 15:42:59 +0000 (15:42 +0000)]
vect: Fix dominator update [PR123152]

The `recompute_dominator' function used in the code fragment within
this patch assumes correctness in the rest of the CFG. Consequently,
it is wrong to rely upon it before the subsequent updates are made in
the "Update dominators for multiple exits" loop in the function.

Furthermore, if `loop_exit' == `scalar_exit', the "Update dominators for
multiple exits" logic will already take care of updating the
dominator for `scalar_exit->dest', such that the moved statement is
unnecessary.

gcc/ChangeLog:

PR tree-optimization/123152
* tree-vect-loop-manip.cc
(slpeel_tree_duplicate_loop_to_edge_cfg): Correct order of
dominator update.

gcc/testsuite/ChangeLog:

* gcc.dg/vect/vect-uncounted-prolog-peel_2.c: New.
* gcc.dg/vect/vect-uncounted-prolog-peel_3.c: Likewise.
* g++.dg/vect/vect-uncounted-prolog-peel_1.cc: Likewise.

7 days agolibgo: use -Wc,-shared-libgcc on Solaris
Ian Lance Taylor [Fri, 19 Dec 2025 19:17:48 +0000 (11:17 -0800)]
libgo: use -Wc,-shared-libgcc on Solaris

Patch from Rainer Orth.

For GCC PR go/64900

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/731482